Examples with SubstrateTargetDescription com.oracle.svm.core.SubstrateTargetDescription used on opensource projects

Example 6 with SubstrateTargetDescription

use of com.oracle.svm.core.SubstrateTargetDescription in project graal by oracle.

the class AMD64CalleeSavedRegisters method emitSave.

/**
 * The increasing different size and number of registers of SSE vs. AVX vs. AVX512 complicates
 * saving and restoring when AOT compilation and JIT compilation use different CPU features: A
 * JIT compiled caller could expect AVX512 registes to be saved, but the AOT compiled callee
 * only saves the SSE registers. Therefore, AOT and JIT compiled code need to have the same CPU
 * features right now. See {@link AMD64CPUFeatureAccess#enableFeatures}.
 */
public void emitSave(AMD64MacroAssembler asm, int frameSize) {
    SubstrateTargetDescription target = ConfigurationValues.getTarget();
    AMD64 arch = (AMD64) target.arch;
    boolean hasAVX = arch.getFeatures().contains(AMD64.CPUFeature.AVX);
    boolean hasAVX512 = arch.getFeatures().contains(AMD64.CPUFeature.AVX512F);
    for (Register register : calleeSavedRegisters) {
        AMD64Address address = calleeSaveAddress(asm, frameSize, register);
        RegisterCategory category = register.getRegisterCategory();
        if (category.equals(AMD64.CPU)) {
            asm.movq(address, register);
        } else if (category.equals(AMD64.XMM)) {
            if (hasAVX512) {
                asm.evmovdqu64(address, register);
            } else if (hasAVX) {
                asm.vmovdqu(address, register);
            } else {
                asm.movdqu(address, register);
            }
        } else if (category.equals(AMD64.MASK)) {
            /* Graal does not use the AVX512 mask registers yet. */
            throw VMError.unimplemented();
        } else {
            throw VMError.shouldNotReachHere();
        }
    }
}

Example 7 with SubstrateTargetDescription

use of com.oracle.svm.core.SubstrateTargetDescription in project graal by oracle.

the class AMD64CalleeSavedRegisters method createAndRegister.

@Platforms(Platform.HOSTED_ONLY.class)
public static void createAndRegister() {
    SubstrateTargetDescription target = ConfigurationValues.getTarget();
    SubstrateRegisterConfig registerConfig = new SubstrateAMD64RegisterConfig(SubstrateRegisterConfig.ConfigKind.NORMAL, null, target, SubstrateOptions.PreserveFramePointer.getValue());
    Register frameRegister = registerConfig.getFrameRegister();
    List<Register> calleeSavedRegisters = new ArrayList<>(registerConfig.getAllocatableRegisters().asList());
    /*
         * Reverse list so that CPU registers are spilled close to the beginning of the frame, i.e.,
         * with a closer-to-0 negative reference map index in the caller frame. That makes the
         * reference map encoding of the caller frame a bit smaller.
         */
    Collections.reverse(calleeSavedRegisters);
    int offset = 0;
    Map<Register, Integer> calleeSavedRegisterOffsets = new HashMap<>();
    for (Register register : calleeSavedRegisters) {
        calleeSavedRegisterOffsets.put(register, offset);
        offset += target.arch.getLargestStorableKind(register.getRegisterCategory()).getSizeInBytes();
    }
    int calleeSavedRegistersSizeInBytes = offset;
    int saveAreaOffsetInFrame = -(FrameAccess.returnAddressSize() + (SubstrateOptions.PreserveFramePointer.getValue() ? FrameAccess.wordSize() : 0) + calleeSavedRegistersSizeInBytes);
    ImageSingletons.add(CalleeSavedRegisters.class, new AMD64CalleeSavedRegisters(frameRegister, calleeSavedRegisters, calleeSavedRegisterOffsets, calleeSavedRegistersSizeInBytes, saveAreaOffsetInFrame));
}