use of org.graalvm.compiler.asm.amd64.AMD64Assembler.OperandSize.DWORD in project graal by oracle.
the class BitOpsTest method tzcntlMemTest.
@Test
public void tzcntlMemTest() {
if (tzcntSupported) {
CodeGenTest test = new CodeGenTest() {
@Override
public byte[] generateCode(CompilationResult compResult, TargetDescription target, RegisterConfig registerConfig, CallingConvention cc) {
AMD64Assembler asm = new AMD64Assembler(target);
Register ret = registerConfig.getReturnRegister(JavaKind.Int);
try {
Field f = IntField.class.getDeclaredField("x");
AMD64Address arg = new AMD64Address(asRegister(cc.getArgument(0)), (int) UNSAFE.objectFieldOffset(f));
TZCNT.emit(asm, DWORD, ret, arg);
asm.ret(0);
return asm.close(true);
} catch (Exception e) {
throw new RuntimeException("exception while trying to generate field access:", e);
}
}
};
assertReturn("intFieldStub", test, 31, new IntField(0x8000_0000));
}
}
use of org.graalvm.compiler.asm.amd64.AMD64Assembler.OperandSize.DWORD in project graal by oracle.
the class BitOpsTest method lzcntlTest.
@Test
public void lzcntlTest() {
if (lzcntSupported) {
CodeGenTest test = new CodeGenTest() {
@Override
public byte[] generateCode(CompilationResult compResult, TargetDescription target, RegisterConfig registerConfig, CallingConvention cc) {
AMD64Assembler asm = new AMD64Assembler(target);
Register ret = registerConfig.getReturnRegister(JavaKind.Int);
Register arg = asRegister(cc.getArgument(0));
LZCNT.emit(asm, DWORD, ret, arg);
asm.ret(0);
return asm.close(true);
}
};
assertReturn("intStub", test, 31, 1);
}
}
use of org.graalvm.compiler.asm.amd64.AMD64Assembler.OperandSize.DWORD in project graal by oracle.
the class BitOpsTest method lzcntlMemTest.
@Test
public void lzcntlMemTest() {
if (lzcntSupported) {
CodeGenTest test = new CodeGenTest() {
@Override
public byte[] generateCode(CompilationResult compResult, TargetDescription target, RegisterConfig registerConfig, CallingConvention cc) {
AMD64Assembler asm = new AMD64Assembler(target);
Register ret = registerConfig.getReturnRegister(JavaKind.Int);
try {
Field f = IntField.class.getDeclaredField("x");
AMD64Address arg = new AMD64Address(asRegister(cc.getArgument(0)), (int) UNSAFE.objectFieldOffset(f));
LZCNT.emit(asm, DWORD, ret, arg);
asm.ret(0);
return asm.close(true);
} catch (Exception e) {
throw new RuntimeException("exception while trying to generate field access:", e);
}
}
};
assertReturn("intFieldStub", test, 31, new IntField(1));
}
}
use of org.graalvm.compiler.asm.amd64.AMD64Assembler.OperandSize.DWORD in project graal by oracle.
the class BitOpsTest method tzcntlTest.
@Test
public void tzcntlTest() {
if (tzcntSupported) {
CodeGenTest test = new CodeGenTest() {
@Override
public byte[] generateCode(CompilationResult compResult, TargetDescription target, RegisterConfig registerConfig, CallingConvention cc) {
AMD64Assembler asm = new AMD64Assembler(target);
Register ret = registerConfig.getReturnRegister(JavaKind.Int);
Register arg = asRegister(cc.getArgument(0));
TZCNT.emit(asm, DWORD, ret, arg);
asm.ret(0);
return asm.close(true);
}
};
assertReturn("intStub", test, 31, 0x8000_0000);
}
}
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