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Example 16 with AMD64Address

use of org.graalvm.compiler.asm.amd64.AMD64Address in project graal by oracle.

the class AMD64MathIntrinsicUnaryOp method cosIntrinsic.

public void cosIntrinsic(Register dest, Register value, CompilationResultBuilder crb, AMD64MacroAssembler masm) {
    ArrayDataPointerConstant oneHalfPtr = new ArrayDataPointerConstant(oneHalf, 16);
    ArrayDataPointerConstant pTwoPtr = new ArrayDataPointerConstant(pTwo, 16);
    ArrayDataPointerConstant scFourPtr = new ArrayDataPointerConstant(scFour, 16);
    ArrayDataPointerConstant cTablePtr = new ArrayDataPointerConstant(cTable, 16);
    ArrayDataPointerConstant scTwoPtr = new ArrayDataPointerConstant(scTwo, 16);
    ArrayDataPointerConstant scThreePtr = new ArrayDataPointerConstant(scThree, 16);
    ArrayDataPointerConstant scOnePtr = new ArrayDataPointerConstant(scOne, 16);
    ArrayDataPointerConstant piInvTablePtr = new ArrayDataPointerConstant(piInvTable, 16);
    ArrayDataPointerConstant piFourPtr = new ArrayDataPointerConstant(piFour, 16);
    ArrayDataPointerConstant piThirtyTwoInvPtr = new ArrayDataPointerConstant(piThirtyTwoInv, 8);
    ArrayDataPointerConstant signMaskPtr = new ArrayDataPointerConstant(signMask, 8);
    ArrayDataPointerConstant pThreePtr = new ArrayDataPointerConstant(pThree, 8);
    ArrayDataPointerConstant pOnePtr = new ArrayDataPointerConstant(pOne, 8);
    ArrayDataPointerConstant onePtr = new ArrayDataPointerConstant(one, 8);
    Label bb0 = new Label();
    Label bb1 = new Label();
    Label bb3 = new Label();
    Label bb4 = new Label();
    Label bb5 = new Label();
    Label bb6 = new Label();
    Label bb7 = new Label();
    Label bb8 = new Label();
    Label bb9 = new Label();
    Label bb10 = new Label();
    Label bb11 = new Label();
    Label bb12 = new Label();
    Label bb13 = new Label();
    Label bb14 = new Label();
    Register gpr1 = asRegister(gpr1Temp, AMD64Kind.QWORD);
    Register gpr2 = asRegister(gpr2Temp, AMD64Kind.QWORD);
    Register gpr3 = asRegister(rcxTemp, AMD64Kind.QWORD);
    Register gpr4 = asRegister(gpr4Temp, AMD64Kind.QWORD);
    Register gpr5 = asRegister(gpr5Temp, AMD64Kind.QWORD);
    Register gpr6 = asRegister(gpr6Temp, AMD64Kind.QWORD);
    Register gpr7 = asRegister(gpr7Temp, AMD64Kind.QWORD);
    Register gpr8 = asRegister(gpr8Temp, AMD64Kind.QWORD);
    Register gpr9 = asRegister(gpr9Temp, AMD64Kind.QWORD);
    Register gpr10 = asRegister(gpr10Temp, AMD64Kind.QWORD);
    Register temp1 = asRegister(xmm1Temp, AMD64Kind.DOUBLE);
    Register temp2 = asRegister(xmm2Temp, AMD64Kind.DOUBLE);
    Register temp3 = asRegister(xmm3Temp, AMD64Kind.DOUBLE);
    Register temp4 = asRegister(xmm4Temp, AMD64Kind.DOUBLE);
    Register temp5 = asRegister(xmm5Temp, AMD64Kind.DOUBLE);
    Register temp6 = asRegister(xmm6Temp, AMD64Kind.DOUBLE);
    Register temp7 = asRegister(xmm7Temp, AMD64Kind.DOUBLE);
    Register temp8 = asRegister(xmm8Temp, AMD64Kind.DOUBLE);
    Register temp9 = asRegister(xmm9Temp, AMD64Kind.DOUBLE);
    AMD64Address stackSlot = (AMD64Address) crb.asAddress(stackTemp);
    setCrb(crb);
    masm.movdq(stackSlot, value);
    if (dest.encoding != value.encoding) {
        masm.movdqu(dest, value);
    }
    masm.leaq(gpr1, stackSlot);
    masm.movl(gpr1, new AMD64Address(gpr1, 4));
    // 0x6dc9c883,
    masm.movdq(temp1, externalAddress(piThirtyTwoInvPtr));
    // 0x40245f30
    masm.andl(gpr1, 2147418112);
    masm.subl(gpr1, 808452096);
    masm.cmpl(gpr1, 281346048);
    masm.jcc(ConditionFlag.Above, bb0);
    masm.mulsd(temp1, dest);
    // 0x00000000,
    masm.movdqu(temp5, externalAddress(oneHalfPtr));
    // 0x3fe00000,
    // 0x00000000,
    // 0x3fe00000
    // 0x00000000,
    masm.movdq(temp4, externalAddress(signMaskPtr));
    // 0x80000000
    masm.pand(temp4, dest);
    masm.por(temp5, temp4);
    masm.addpd(temp1, temp5);
    masm.cvttsd2sil(gpr4, temp1);
    masm.cvtsi2sdl(temp1, gpr4);
    // 0x1a600000,
    masm.movdqu(temp2, externalAddress(pTwoPtr));
    // 0x3d90b461,
    // 0x1a600000,
    // 0x3d90b461
    // 0x54400000,
    masm.movdq(temp3, externalAddress(pOnePtr));
    // 0x3fb921fb
    masm.mulsd(temp3, temp1);
    masm.unpcklpd(temp1, temp1);
    masm.addq(gpr4, 1865232);
    masm.movdqu(temp4, dest);
    masm.andq(gpr4, 63);
    // 0xa556c734,
    masm.movdqu(temp5, externalAddress(scFourPtr));
    // 0x3ec71de3,
    // 0x1a01a01a,
    // 0x3efa01a0
    masm.leaq(gpr1, externalAddress(cTablePtr));
    masm.shlq(gpr4, 5);
    masm.addq(gpr1, gpr4);
    masm.movdqu(temp8, new AMD64Address(gpr1, 0));
    masm.mulpd(temp2, temp1);
    masm.subsd(dest, temp3);
    // 0x2e037073,
    masm.mulsd(temp1, externalAddress(pThreePtr));
    // 0x3b63198a
    masm.subsd(temp4, temp3);
    masm.unpcklpd(dest, dest);
    masm.movdqu(temp3, temp4);
    masm.subsd(temp4, temp2);
    masm.mulpd(temp5, dest);
    masm.subpd(dest, temp2);
    masm.pshufd(temp7, temp8, 0xE);
    // 0x11111111,
    masm.movdqu(temp6, externalAddress(scTwoPtr));
    // 0x3f811111,
    // 0x55555555,
    // 0x3fa55555
    masm.mulsd(temp7, temp4);
    masm.subsd(temp3, temp4);
    masm.mulpd(temp5, dest);
    masm.mulpd(dest, dest);
    masm.subsd(temp3, temp2);
    masm.movdqu(temp2, temp8);
    masm.subsd(temp1, temp3);
    masm.movdq(temp3, new AMD64Address(gpr1, 24));
    masm.addsd(temp2, temp3);
    masm.subsd(temp7, temp2);
    masm.mulsd(temp2, temp4);
    masm.mulpd(temp6, dest);
    masm.mulsd(temp3, temp4);
    masm.mulpd(temp2, dest);
    masm.mulpd(dest, dest);
    // 0x1a01a01a,
    masm.addpd(temp5, externalAddress(scThreePtr));
    // 0xbf2a01a0,
    // 0x16c16c17,
    // 0xbf56c16c
    masm.mulsd(temp4, temp8);
    masm.pshufd(temp9, temp8, 0xE);
    // 0x55555555,
    masm.addpd(temp6, externalAddress(scOnePtr));
    // 0xbfc55555,
    // 0x00000000,
    // 0xbfe00000
    masm.mulpd(temp5, dest);
    masm.movdqu(dest, temp3);
    masm.addsd(temp3, temp9);
    masm.mulpd(temp1, temp7);
    masm.movdqu(temp7, temp4);
    masm.addsd(temp4, temp3);
    masm.addpd(temp6, temp5);
    masm.subsd(temp9, temp3);
    masm.subsd(temp3, temp4);
    masm.addsd(temp1, new AMD64Address(gpr1, 16));
    masm.mulpd(temp6, temp2);
    masm.addsd(dest, temp9);
    masm.addsd(temp3, temp7);
    masm.addsd(dest, temp1);
    masm.addsd(dest, temp3);
    masm.addsd(dest, temp6);
    masm.unpckhpd(temp6, temp6);
    masm.addsd(dest, temp6);
    masm.addsd(dest, temp4);
    masm.jmp(bb13);
    masm.bind(bb14);
    masm.xorpd(temp1, temp1);
    masm.xorpd(dest, dest);
    masm.divsd(dest, temp1);
    masm.jmp(bb13);
    masm.bind(bb0);
    masm.jcc(ConditionFlag.Greater, bb1);
    masm.pextrw(gpr1, dest, 3);
    masm.andl(gpr1, 32767);
    masm.pinsrw(dest, gpr1, 3);
    // 0x00000000,
    masm.movdq(temp1, externalAddress(onePtr));
    // 0x3ff00000
    masm.subsd(temp1, dest);
    masm.movdqu(dest, temp1);
    masm.jmp(bb13);
    masm.bind(bb1);
    masm.pextrw(gpr3, dest, 3);
    masm.andl(gpr3, 32752);
    masm.cmpl(gpr3, 32752);
    masm.jcc(ConditionFlag.Equal, bb14);
    masm.subl(gpr3, 16224);
    masm.shrl(gpr3, 7);
    masm.andl(gpr3, 65532);
    masm.leaq(gpr10, externalAddress(piInvTablePtr));
    masm.addq(gpr3, gpr10);
    masm.movdq(gpr1, dest);
    masm.movl(gpr9, new AMD64Address(gpr3, 20));
    masm.movl(gpr7, new AMD64Address(gpr3, 24));
    masm.movl(gpr4, gpr1);
    masm.shrq(gpr1, 21);
    masm.orl(gpr1, Integer.MIN_VALUE);
    masm.shrl(gpr1, 11);
    masm.movl(gpr8, gpr9);
    masm.imulq(gpr9, gpr4);
    masm.imulq(gpr8, gpr1);
    masm.imulq(gpr7, gpr1);
    masm.movl(gpr5, new AMD64Address(gpr3, 16));
    masm.movl(gpr6, new AMD64Address(gpr3, 12));
    masm.movl(gpr10, gpr9);
    masm.shrq(gpr9, 32);
    masm.addq(gpr8, gpr9);
    masm.addq(gpr10, gpr7);
    masm.movl(gpr7, gpr10);
    masm.shrq(gpr10, 32);
    masm.addq(gpr8, gpr10);
    masm.movl(gpr9, gpr5);
    masm.imulq(gpr5, gpr4);
    masm.imulq(gpr9, gpr1);
    masm.movl(gpr10, gpr6);
    masm.imulq(gpr6, gpr4);
    masm.movl(gpr2, gpr5);
    masm.shrq(gpr5, 32);
    masm.addq(gpr8, gpr2);
    masm.movl(gpr2, gpr8);
    masm.shrq(gpr8, 32);
    masm.addq(gpr9, gpr5);
    masm.addq(gpr9, gpr8);
    masm.shlq(gpr2, 32);
    masm.orq(gpr7, gpr2);
    masm.imulq(gpr10, gpr1);
    masm.movl(gpr8, new AMD64Address(gpr3, 8));
    masm.movl(gpr5, new AMD64Address(gpr3, 4));
    masm.movl(gpr2, gpr6);
    masm.shrq(gpr6, 32);
    masm.addq(gpr9, gpr2);
    masm.movl(gpr2, gpr9);
    masm.shrq(gpr9, 32);
    masm.addq(gpr10, gpr6);
    masm.addq(gpr10, gpr9);
    masm.movq(gpr6, gpr8);
    masm.imulq(gpr8, gpr4);
    masm.imulq(gpr6, gpr1);
    masm.movl(gpr9, gpr8);
    masm.shrq(gpr8, 32);
    masm.addq(gpr10, gpr9);
    masm.movl(gpr9, gpr10);
    masm.shrq(gpr10, 32);
    masm.addq(gpr6, gpr8);
    masm.addq(gpr6, gpr10);
    masm.movq(gpr8, gpr5);
    masm.imulq(gpr5, gpr4);
    masm.imulq(gpr8, gpr1);
    masm.shlq(gpr9, 32);
    masm.orq(gpr9, gpr2);
    masm.movl(gpr1, new AMD64Address(gpr3, 0));
    masm.movl(gpr10, gpr5);
    masm.shrq(gpr5, 32);
    masm.addq(gpr6, gpr10);
    masm.movl(gpr10, gpr6);
    masm.shrq(gpr6, 32);
    masm.addq(gpr8, gpr5);
    masm.addq(gpr8, gpr6);
    masm.imulq(gpr4, gpr1);
    masm.pextrw(gpr2, dest, 3);
    masm.leaq(gpr6, externalAddress(piInvTablePtr));
    masm.subq(gpr3, gpr6);
    masm.addl(gpr3, gpr3);
    masm.addl(gpr3, gpr3);
    masm.addl(gpr3, gpr3);
    masm.addl(gpr3, 19);
    masm.movl(gpr5, 32768);
    masm.andl(gpr5, gpr2);
    masm.shrl(gpr2, 4);
    masm.andl(gpr2, 2047);
    masm.subl(gpr2, 1023);
    masm.subl(gpr3, gpr2);
    masm.addq(gpr8, gpr4);
    masm.movl(gpr4, gpr3);
    masm.addl(gpr4, 32);
    masm.cmpl(gpr3, 1);
    masm.jcc(ConditionFlag.Less, bb3);
    masm.negl(gpr3);
    masm.addl(gpr3, 29);
    masm.shll(gpr8);
    masm.movl(gpr6, gpr8);
    masm.andl(gpr8, 536870911);
    masm.testl(gpr8, 268435456);
    masm.jcc(ConditionFlag.NotEqual, bb4);
    masm.shrl(gpr8);
    masm.movl(gpr2, 0);
    masm.shlq(gpr8, 32);
    masm.orq(gpr8, gpr10);
    masm.bind(bb5);
    masm.bind(bb6);
    masm.cmpq(gpr8, 0);
    masm.jcc(ConditionFlag.Equal, bb7);
    masm.bind(bb8);
    masm.bsrq(gpr10, gpr8);
    masm.movl(gpr3, 29);
    masm.subl(gpr3, gpr10);
    masm.jcc(ConditionFlag.LessEqual, bb9);
    masm.shlq(gpr8);
    masm.movq(gpr1, gpr9);
    masm.shlq(gpr9);
    masm.addl(gpr4, gpr3);
    masm.negl(gpr3);
    masm.addl(gpr3, 64);
    masm.shrq(gpr1);
    masm.shrq(gpr7);
    masm.orq(gpr8, gpr1);
    masm.orq(gpr9, gpr7);
    masm.bind(bb10);
    masm.cvtsi2sdq(dest, gpr8);
    masm.shrq(gpr9, 1);
    masm.cvtsi2sdq(temp3, gpr9);
    masm.xorpd(temp4, temp4);
    masm.shll(gpr4, 4);
    masm.negl(gpr4);
    masm.addl(gpr4, 16368);
    masm.orl(gpr4, gpr5);
    masm.xorl(gpr4, gpr2);
    masm.pinsrw(temp4, gpr4, 3);
    masm.leaq(gpr2, externalAddress(piFourPtr));
    // 0x40000000,
    masm.movdqu(temp2, new AMD64Address(gpr2, 0));
    // 0x3fe921fb,
    // 0x18469899,
    // 0x3e64442d
    masm.xorpd(temp5, temp5);
    masm.subl(gpr4, 1008);
    masm.pinsrw(temp5, gpr4, 3);
    masm.mulsd(dest, temp4);
    masm.shll(gpr5, 16);
    masm.sarl(gpr5, 31);
    masm.mulsd(temp3, temp5);
    masm.movdqu(temp1, dest);
    masm.mulsd(dest, temp2);
    masm.pshufd(temp6, temp2, 0xE);
    masm.shrl(gpr6, 29);
    masm.addsd(temp1, temp3);
    masm.mulsd(temp3, temp2);
    masm.addl(gpr6, gpr5);
    masm.xorl(gpr6, gpr5);
    masm.mulsd(temp6, temp1);
    masm.movl(gpr1, gpr6);
    masm.addsd(temp6, temp3);
    masm.movdqu(temp2, dest);
    masm.addsd(dest, temp6);
    masm.subsd(temp2, dest);
    masm.addsd(temp6, temp2);
    masm.bind(bb11);
    // 0x6dc9c883,
    masm.movq(temp1, externalAddress(piThirtyTwoInvPtr));
    // 0x40245f30
    masm.mulsd(temp1, dest);
    // 0x00000000,
    masm.movdq(temp5, externalAddress(oneHalfPtr));
    // 0x3fe00000,
    // 0x00000000,
    // 0x3fe00000
    // 0x00000000,
    masm.movdq(temp4, externalAddress(signMaskPtr));
    // 0x80000000
    masm.pand(temp4, dest);
    masm.por(temp5, temp4);
    masm.addpd(temp1, temp5);
    masm.cvttsd2siq(gpr4, temp1);
    masm.cvtsi2sdq(temp1, gpr4);
    // 0x54400000,
    masm.movdq(temp3, externalAddress(pOnePtr));
    // 0x3fb921fb
    // 0x1a600000,
    masm.movdqu(temp2, externalAddress(pTwoPtr));
    // 0x3d90b461,
    // 0x1a600000,
    // 0x3d90b461
    masm.mulsd(temp3, temp1);
    masm.unpcklpd(temp1, temp1);
    masm.shll(gpr1, 3);
    masm.addl(gpr4, 1865232);
    masm.movdqu(temp4, dest);
    masm.addl(gpr4, gpr1);
    masm.andl(gpr4, 63);
    // 0xa556c734,
    masm.movdqu(temp5, externalAddress(scFourPtr));
    // 0x3ec71de3,
    // 0x1a01a01a,
    // 0x3efa01a0
    masm.leaq(gpr1, externalAddress(cTablePtr));
    masm.shll(gpr4, 5);
    masm.addq(gpr1, gpr4);
    masm.movdqu(temp8, new AMD64Address(gpr1, 0));
    masm.mulpd(temp2, temp1);
    masm.subsd(dest, temp3);
    // 0x2e037073,
    masm.mulsd(temp1, externalAddress(pThreePtr));
    // 0x3b63198a
    masm.subsd(temp4, temp3);
    masm.unpcklpd(dest, dest);
    masm.movdqu(temp3, temp4);
    masm.subsd(temp4, temp2);
    masm.mulpd(temp5, dest);
    masm.pshufd(temp7, temp8, 0xE);
    masm.movdqu(temp9, temp7);
    masm.subpd(dest, temp2);
    masm.mulsd(temp7, temp4);
    masm.subsd(temp3, temp4);
    masm.mulpd(temp5, dest);
    masm.mulpd(dest, dest);
    masm.subsd(temp3, temp2);
    masm.movdqu(temp2, temp8);
    masm.subsd(temp1, temp3);
    masm.movdq(temp3, new AMD64Address(gpr1, 24));
    masm.addsd(temp2, temp3);
    masm.subsd(temp7, temp2);
    masm.subsd(temp1, temp6);
    // 0x11111111,
    masm.movdqu(temp6, externalAddress(scTwoPtr));
    // 0x3f811111,
    // 0x55555555,
    // 0x3fa55555
    masm.mulsd(temp2, temp4);
    masm.mulpd(temp6, dest);
    masm.mulsd(temp3, temp4);
    masm.mulpd(temp2, dest);
    masm.mulpd(dest, dest);
    // 0x1a01a01a,
    masm.addpd(temp5, externalAddress(scThreePtr));
    // 0xbf2a01a0,
    // 0x16c16c17,
    // 0xbf56c16c
    masm.mulsd(temp4, temp8);
    // 0x55555555,
    masm.addpd(temp6, externalAddress(scOnePtr));
    // 0xbfc55555,
    // 0x00000000,
    // 0xbfe00000
    masm.mulpd(temp5, dest);
    masm.movdqu(dest, temp3);
    masm.addsd(temp3, temp9);
    masm.mulpd(temp1, temp7);
    masm.movdqu(temp7, temp4);
    masm.addsd(temp4, temp3);
    masm.addpd(temp6, temp5);
    masm.subsd(temp9, temp3);
    masm.subsd(temp3, temp4);
    masm.addsd(temp1, new AMD64Address(gpr1, 16));
    masm.mulpd(temp6, temp2);
    masm.addsd(temp9, dest);
    masm.addsd(temp3, temp7);
    masm.addsd(temp1, temp9);
    masm.addsd(temp1, temp3);
    masm.addsd(temp1, temp6);
    masm.unpckhpd(temp6, temp6);
    masm.movdqu(dest, temp4);
    masm.addsd(temp1, temp6);
    masm.addsd(dest, temp1);
    masm.jmp(bb13);
    masm.bind(bb7);
    masm.addl(gpr4, 64);
    masm.movq(gpr8, gpr9);
    masm.movq(gpr9, gpr7);
    masm.movl(gpr7, 0);
    masm.cmpq(gpr8, 0);
    masm.jcc(ConditionFlag.NotEqual, bb8);
    masm.addl(gpr4, 64);
    masm.movq(gpr8, gpr9);
    masm.movq(gpr9, gpr7);
    masm.cmpq(gpr8, 0);
    masm.jcc(ConditionFlag.NotEqual, bb8);
    masm.xorpd(dest, dest);
    masm.xorpd(temp6, temp6);
    masm.jmp(bb11);
    masm.bind(bb9);
    masm.jcc(ConditionFlag.Equal, bb10);
    masm.negl(gpr3);
    masm.shrq(gpr9);
    masm.movq(gpr1, gpr8);
    masm.shrq(gpr8);
    masm.subl(gpr4, gpr3);
    masm.negl(gpr3);
    masm.addl(gpr3, 64);
    masm.shlq(gpr1);
    masm.orq(gpr9, gpr1);
    masm.jmp(bb10);
    masm.bind(bb3);
    masm.negl(gpr3);
    masm.shlq(gpr8, 32);
    masm.orq(gpr8, gpr10);
    masm.shlq(gpr8);
    masm.movq(gpr6, gpr8);
    masm.testl(gpr8, Integer.MIN_VALUE);
    masm.jcc(ConditionFlag.NotEqual, bb12);
    masm.shrl(gpr8);
    masm.movl(gpr2, 0);
    masm.shrq(gpr6, 3);
    masm.jmp(bb6);
    masm.bind(bb4);
    masm.shrl(gpr8);
    masm.movl(gpr2, 536870912);
    masm.shrl(gpr2);
    masm.shlq(gpr8, 32);
    masm.orq(gpr8, gpr10);
    masm.shlq(gpr2, 32);
    masm.addl(gpr6, 536870912);
    masm.movl(gpr3, 0);
    masm.movl(gpr10, 0);
    masm.subq(gpr3, gpr7);
    masm.sbbq(gpr10, gpr9);
    masm.sbbq(gpr2, gpr8);
    masm.movq(gpr7, gpr3);
    masm.movq(gpr9, gpr10);
    masm.movq(gpr8, gpr2);
    masm.movl(gpr2, 32768);
    masm.jmp(bb5);
    masm.bind(bb12);
    masm.shrl(gpr8);
    masm.movq(gpr2, 0x100000000L);
    masm.shrq(gpr2);
    masm.movl(gpr3, 0);
    masm.movl(gpr10, 0);
    masm.subq(gpr3, gpr7);
    masm.sbbq(gpr10, gpr9);
    masm.sbbq(gpr2, gpr8);
    masm.movq(gpr7, gpr3);
    masm.movq(gpr9, gpr10);
    masm.movq(gpr8, gpr2);
    masm.movl(gpr2, 32768);
    masm.shrq(gpr6, 3);
    masm.addl(gpr6, 536870912);
    masm.jmp(bb6);
    masm.bind(bb13);
}
Also used : Register(jdk.vm.ci.code.Register) ValueUtil.asRegister(jdk.vm.ci.code.ValueUtil.asRegister) ArrayDataPointerConstant(org.graalvm.compiler.lir.asm.ArrayDataPointerConstant) Label(org.graalvm.compiler.asm.Label) AMD64Address(org.graalvm.compiler.asm.amd64.AMD64Address)

Example 17 with AMD64Address

use of org.graalvm.compiler.asm.amd64.AMD64Address in project graal by oracle.

the class AMD64Move method const2stack.

public static void const2stack(CompilationResultBuilder crb, AMD64MacroAssembler masm, Value result, JavaConstant input) {
    AMD64Address dest = (AMD64Address) crb.asAddress(result);
    final long imm;
    switch(input.getJavaKind().getStackKind()) {
        case Int:
            imm = input.asInt();
            break;
        case Long:
            imm = input.asLong();
            break;
        case Float:
            imm = floatToRawIntBits(input.asFloat());
            break;
        case Double:
            imm = doubleToRawLongBits(input.asDouble());
            break;
        case Object:
            if (input.isNull()) {
                imm = 0;
            } else {
                throw GraalError.shouldNotReachHere("Non-null object constants must be in register");
            }
            break;
        default:
            throw GraalError.shouldNotReachHere();
    }
    switch((AMD64Kind) result.getPlatformKind()) {
        case BYTE:
            assert NumUtil.isByte(imm) : "Is not in byte range: " + imm;
            AMD64MIOp.MOVB.emit(masm, OperandSize.BYTE, dest, (int) imm);
            break;
        case WORD:
            assert NumUtil.isShort(imm) : "Is not in short range: " + imm;
            AMD64MIOp.MOV.emit(masm, OperandSize.WORD, dest, (int) imm);
            break;
        case DWORD:
        case SINGLE:
            assert NumUtil.isInt(imm) : "Is not in int range: " + imm;
            masm.movl(dest, (int) imm);
            break;
        case QWORD:
        case DOUBLE:
            masm.movlong(dest, imm);
            break;
        default:
            throw GraalError.shouldNotReachHere("Unknown result Kind: " + result.getPlatformKind());
    }
}
Also used : AMD64Kind(jdk.vm.ci.amd64.AMD64Kind) AMD64Address(org.graalvm.compiler.asm.amd64.AMD64Address)

Example 18 with AMD64Address

use of org.graalvm.compiler.asm.amd64.AMD64Address in project graal by oracle.

the class BitOpsTest method tzcntlMemTest.

@Test
public void tzcntlMemTest() {
    if (tzcntSupported) {
        CodeGenTest test = new CodeGenTest() {

            @Override
            public byte[] generateCode(CompilationResult compResult, TargetDescription target, RegisterConfig registerConfig, CallingConvention cc) {
                AMD64Assembler asm = new AMD64Assembler(target);
                Register ret = registerConfig.getReturnRegister(JavaKind.Int);
                try {
                    Field f = IntField.class.getDeclaredField("x");
                    AMD64Address arg = new AMD64Address(asRegister(cc.getArgument(0)), (int) UNSAFE.objectFieldOffset(f));
                    TZCNT.emit(asm, DWORD, ret, arg);
                    asm.ret(0);
                    return asm.close(true);
                } catch (Exception e) {
                    throw new RuntimeException("exception while trying to generate field access:", e);
                }
            }
        };
        assertReturn("intFieldStub", test, 31, new IntField(0x8000_0000));
    }
}
Also used : CallingConvention(jdk.vm.ci.code.CallingConvention) RegisterConfig(jdk.vm.ci.code.RegisterConfig) Field(java.lang.reflect.Field) Register(jdk.vm.ci.code.Register) ValueUtil.asRegister(jdk.vm.ci.code.ValueUtil.asRegister) AMD64Assembler(org.graalvm.compiler.asm.amd64.AMD64Assembler) TargetDescription(jdk.vm.ci.code.TargetDescription) CompilationResult(org.graalvm.compiler.code.CompilationResult) AMD64Address(org.graalvm.compiler.asm.amd64.AMD64Address) Test(org.junit.Test) AssemblerTest(org.graalvm.compiler.asm.test.AssemblerTest)

Example 19 with AMD64Address

use of org.graalvm.compiler.asm.amd64.AMD64Address in project graal by oracle.

the class BitOpsTest method lzcntlMemTest.

@Test
public void lzcntlMemTest() {
    if (lzcntSupported) {
        CodeGenTest test = new CodeGenTest() {

            @Override
            public byte[] generateCode(CompilationResult compResult, TargetDescription target, RegisterConfig registerConfig, CallingConvention cc) {
                AMD64Assembler asm = new AMD64Assembler(target);
                Register ret = registerConfig.getReturnRegister(JavaKind.Int);
                try {
                    Field f = IntField.class.getDeclaredField("x");
                    AMD64Address arg = new AMD64Address(asRegister(cc.getArgument(0)), (int) UNSAFE.objectFieldOffset(f));
                    LZCNT.emit(asm, DWORD, ret, arg);
                    asm.ret(0);
                    return asm.close(true);
                } catch (Exception e) {
                    throw new RuntimeException("exception while trying to generate field access:", e);
                }
            }
        };
        assertReturn("intFieldStub", test, 31, new IntField(1));
    }
}
Also used : CallingConvention(jdk.vm.ci.code.CallingConvention) RegisterConfig(jdk.vm.ci.code.RegisterConfig) Field(java.lang.reflect.Field) Register(jdk.vm.ci.code.Register) ValueUtil.asRegister(jdk.vm.ci.code.ValueUtil.asRegister) AMD64Assembler(org.graalvm.compiler.asm.amd64.AMD64Assembler) TargetDescription(jdk.vm.ci.code.TargetDescription) CompilationResult(org.graalvm.compiler.code.CompilationResult) AMD64Address(org.graalvm.compiler.asm.amd64.AMD64Address) Test(org.junit.Test) AssemblerTest(org.graalvm.compiler.asm.test.AssemblerTest)

Example 20 with AMD64Address

use of org.graalvm.compiler.asm.amd64.AMD64Address in project graal by oracle.

the class AMD64CGlobalDataLoadAddressOp method emitCode.

@Override
public void emitCode(CompilationResultBuilder crb, AMD64MacroAssembler masm) {
    if (SubstrateUtil.HOSTED) {
        // AOT compilation: record patch that is fixed up later
        int before = masm.position();
        AMD64Address address = masm.getPlaceholder(before);
        if (dataInfo.isSymbolReference()) {
            // Pure symbol reference: the data contains the symbol's address, load it
            masm.movq(asRegister(result), address);
        } else {
            // Data: load its address
            masm.leaq(asRegister(result), address);
        }
        crb.compilationResult.recordDataPatch(before, new CGlobalDataReference(dataInfo));
    } else {
        // Runtime compilation: compute the actual address
        Pointer globalsBase = CGlobalDataInfo.CGLOBALDATA_RUNTIME_BASE_ADDRESS.get();
        Pointer address = globalsBase.add(dataInfo.getOffset());
        masm.movq(asRegister(result), address.rawValue());
        if (dataInfo.isSymbolReference()) {
            // load data, which contains symbol's address
            masm.movq(asRegister(result), new AMD64Address(asRegister(result)));
        }
    }
}
Also used : CGlobalDataReference(com.oracle.svm.core.graal.code.CGlobalDataReference) Pointer(org.graalvm.word.Pointer) AMD64Address(org.graalvm.compiler.asm.amd64.AMD64Address)

Aggregations

AMD64Address (org.graalvm.compiler.asm.amd64.AMD64Address)36 Register (jdk.vm.ci.code.Register)26 ValueUtil.asRegister (jdk.vm.ci.code.ValueUtil.asRegister)23 Label (org.graalvm.compiler.asm.Label)15 ArrayDataPointerConstant (org.graalvm.compiler.lir.asm.ArrayDataPointerConstant)7 CallingConvention (jdk.vm.ci.code.CallingConvention)6 RegisterConfig (jdk.vm.ci.code.RegisterConfig)5 TargetDescription (jdk.vm.ci.code.TargetDescription)5 Field (java.lang.reflect.Field)4 AMD64Assembler (org.graalvm.compiler.asm.amd64.AMD64Assembler)4 AssemblerTest (org.graalvm.compiler.asm.test.AssemblerTest)4 CompilationResult (org.graalvm.compiler.code.CompilationResult)4 Test (org.junit.Test)4 AMD64MacroAssembler (org.graalvm.compiler.asm.amd64.AMD64MacroAssembler)3 AMD64Kind (jdk.vm.ci.amd64.AMD64Kind)2 Scale (org.graalvm.compiler.asm.amd64.AMD64Address.Scale)2 CGlobalDataReference (com.oracle.svm.core.graal.code.CGlobalDataReference)1 SubstrateRegisterConfig (com.oracle.svm.core.graal.meta.SubstrateRegisterConfig)1 AMD64.rax (jdk.vm.ci.amd64.AMD64.rax)1 AMD64.rbx (jdk.vm.ci.amd64.AMD64.rbx)1