use of org.graalvm.compiler.core.common.spi.CodeGenProviders in project graal by oracle.
the class AArch64TruffleCallBoundaryInstumentationFactory method create.
@Override
public CompilationResultBuilderFactory create(MetaAccessProvider metaAccess, GraalHotSpotVMConfig config, HotSpotRegistersProvider registers) {
return new TruffleCompilationResultBuilderFactory(metaAccess, config, registers) {
@Override
public CompilationResultBuilder createBuilder(CodeGenProviders providers, FrameMap frameMap, Assembler asm, DataBuilder dataBuilder, FrameContext frameContext, OptionValues options, DebugContext debug, CompilationResult compilationResult, Register nullRegister) {
return new TruffleCallBoundaryInstrumentation(providers, frameMap, asm, dataBuilder, frameContext, options, debug, compilationResult, config, registers) {
@Override
protected void injectTailCallCode(int installedCodeOffset, int entryPointOffset) {
AArch64MacroAssembler masm = (AArch64MacroAssembler) this.asm;
AArch64HotSpotBackend.emitInvalidatePlaceholder(this, masm);
try (ScratchRegister scratch = masm.getScratchRegister()) {
Register thisRegister = codeCache.getRegisterConfig().getCallingConventionRegisters(JavaCall, Object).get(0);
Register spillRegister = scratch.getRegister();
Label doProlog = new Label();
if (config.useCompressedOops) {
CompressEncoding encoding = config.getOopEncoding();
masm.ldr(32, spillRegister, AArch64Address.createImmediateAddress(32, AArch64Address.AddressingMode.IMMEDIATE_UNSIGNED_SCALED, thisRegister, installedCodeOffset));
Register base = encoding.hasBase() ? registers.getHeapBaseRegister() : null;
AArch64HotSpotMove.UncompressPointer.emitUncompressCode(masm, spillRegister, spillRegister, base, encoding.getShift(), true);
} else {
masm.ldr(64, spillRegister, AArch64Address.createImmediateAddress(64, AArch64Address.AddressingMode.IMMEDIATE_UNSIGNED_SCALED, thisRegister, installedCodeOffset));
}
masm.ldr(64, spillRegister, AArch64Address.createImmediateAddress(64, AArch64Address.AddressingMode.IMMEDIATE_UNSIGNED_SCALED, spillRegister, entryPointOffset));
masm.cbz(64, spillRegister, doProlog);
masm.jmp(spillRegister);
masm.nop();
masm.bind(doProlog);
}
}
};
}
};
}
use of org.graalvm.compiler.core.common.spi.CodeGenProviders in project graal by oracle.
the class AMD64TruffleCallBoundaryInstrumentationFactory method create.
@Override
public CompilationResultBuilderFactory create(MetaAccessProvider metaAccess, GraalHotSpotVMConfig config, HotSpotRegistersProvider registers) {
return new TruffleCompilationResultBuilderFactory(metaAccess, config, registers) {
@Override
public CompilationResultBuilder createBuilder(CodeGenProviders providers, FrameMap frameMap, Assembler asm, DataBuilder dataBuilder, FrameContext frameContext, OptionValues options, DebugContext debug, CompilationResult compilationResult, Register nullRegister) {
return new TruffleCallBoundaryInstrumentation(providers, frameMap, asm, dataBuilder, frameContext, options, debug, compilationResult, config, registers) {
@Override
protected void injectTailCallCode(int installedCodeOffset, int entryPointOffset) {
AMD64MacroAssembler masm = (AMD64MacroAssembler) this.asm;
Register thisRegister = codeCache.getRegisterConfig().getCallingConventionRegisters(JavaCall, JavaKind.Object).get(0);
Register spillRegister = AMD64.r10;
Label doProlog = new Label();
int pos = masm.position();
if (config.useCompressedOops) {
// First instruction must be at least 5 bytes long to be safe for
// patching
masm.movl(spillRegister, new AMD64Address(thisRegister, installedCodeOffset), true);
assert masm.position() - pos >= AMD64HotSpotBackend.PATCHED_VERIFIED_ENTRY_POINT_INSTRUCTION_SIZE;
CompressEncoding encoding = config.getOopEncoding();
Register heapBaseRegister = AMD64Move.UncompressPointerOp.hasBase(encoding) ? registers.getHeapBaseRegister() : Register.None;
AMD64Move.UncompressPointerOp.emitUncompressCode(masm, spillRegister, encoding.getShift(), heapBaseRegister, true);
} else {
// First instruction must be at least 5 bytes long to be safe for
// patching
masm.movq(spillRegister, new AMD64Address(thisRegister, installedCodeOffset), true);
assert masm.position() - pos >= AMD64HotSpotBackend.PATCHED_VERIFIED_ENTRY_POINT_INSTRUCTION_SIZE;
}
masm.movq(spillRegister, new AMD64Address(spillRegister, entryPointOffset));
masm.testqAndJcc(spillRegister, spillRegister, ConditionFlag.Equal, doProlog, true);
masm.jmp(spillRegister);
masm.bind(doProlog);
}
};
}
};
}
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