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Example 1 with AMD64ClearRegisterOp

use of org.graalvm.compiler.lir.amd64.AMD64ClearRegisterOp in project graal by oracle.

the class AMD64ArithmeticLIRGenerator method emitDIV.

private AMD64MulDivOp emitDIV(OperandSize size, Value a, Value b, LIRFrameState state) {
    LIRKind kind = LIRKind.combine(a, b);
    RegisterValue rax = moveToReg(AMD64.rax, a);
    RegisterValue rdx = AMD64.rdx.asValue(kind);
    getLIRGen().append(new AMD64ClearRegisterOp(size, rdx));
    return getLIRGen().append(new AMD64MulDivOp(AMD64MOp.DIV, size, kind, rdx, rax, getLIRGen().asAllocatable(b), state));
}
Also used : RegisterValue(jdk.vm.ci.code.RegisterValue) AMD64MulDivOp(org.graalvm.compiler.lir.amd64.AMD64MulDivOp) LIRKind(org.graalvm.compiler.core.common.LIRKind) AMD64ClearRegisterOp(org.graalvm.compiler.lir.amd64.AMD64ClearRegisterOp)

Aggregations

RegisterValue (jdk.vm.ci.code.RegisterValue)1 LIRKind (org.graalvm.compiler.core.common.LIRKind)1 AMD64ClearRegisterOp (org.graalvm.compiler.lir.amd64.AMD64ClearRegisterOp)1 AMD64MulDivOp (org.graalvm.compiler.lir.amd64.AMD64MulDivOp)1