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Example 6 with PowerPCConditionOperand

use of org.jikesrvm.compilers.opt.ir.operand.ppc.PowerPCConditionOperand in project JikesRVM by JikesRVM.

the class BURS_Helpers method EMIT_BOOLCMP_BRANCH.

protected final void EMIT_BOOLCMP_BRANCH(BranchOperand target, BranchProfileOperand bp) {
    if (VM.VerifyAssertions)
        VM._assert(cc != null);
    RegisterOperand cr = regpool.makeTempCondition();
    Operator op;
    if (VM.BuildFor64Addr && isAddress) {
        if (val2 instanceof IntConstantOperand) {
            op = cc.isUNSIGNED() ? PPC64_CMPLI : PPC64_CMPI;
        } else {
            op = cc.isUNSIGNED() ? PPC64_CMPL : PPC64_CMP;
        }
    } else if (val2 instanceof IntConstantOperand) {
        op = cc.isUNSIGNED() ? PPC_CMPLI : PPC_CMPI;
    } else {
        op = cc.isUNSIGNED() ? PPC_CMPL : PPC_CMP;
    }
    EMIT(MIR_Binary.create(op, cr, R(val1), val2));
    EMIT(MIR_CondBranch.create(PPC_BCOND, cr.copyD2U(), new PowerPCConditionOperand(cc), target, bp));
    if (VM.VerifyAssertions) {
        cc = null;
        val1 = null;
        val2 = null;
    }
}
Also used : Operator(org.jikesrvm.compilers.opt.ir.Operator) RegisterOperand(org.jikesrvm.compilers.opt.ir.operand.RegisterOperand) IntConstantOperand(org.jikesrvm.compilers.opt.ir.operand.IntConstantOperand) PowerPCConditionOperand(org.jikesrvm.compilers.opt.ir.operand.ppc.PowerPCConditionOperand)

Example 7 with PowerPCConditionOperand

use of org.jikesrvm.compilers.opt.ir.operand.ppc.PowerPCConditionOperand in project JikesRVM by JikesRVM.

the class BURS_Helpers method DOUBLE_IFCMP.

protected final void DOUBLE_IFCMP(Instruction s, RegisterOperand left, Operand right) {
    // Create compare
    RegisterOperand cr = regpool.makeTempCondition();
    EMIT(MIR_Binary.create(PPC_FCMPU, cr, left, right));
    // Branch depends on condition
    ConditionOperand c = IfCmp.getCond(s);
    BranchOperand target = IfCmp.getClearTarget(s);
    if (!c.branchIfUnordered()) {
        // If branch doesn't branch when unordered then we need just one
        // branch destination
        EMIT(MIR_CondBranch.create(PPC_BCOND, cr.copyD2U(), new PowerPCConditionOperand(c), target, IfCmp.getClearBranchProfile(s)));
    } else {
        if ((c.value != ConditionOperand.NOT_EQUAL) || (!left.similar(right))) {
            // Propagate branch probabilities as follows: assume the
            // probability of unordered (first condition) is zero, and
            // propagate the original probability to the second condition.
            EMIT(MIR_CondBranch2.create(PPC_BCOND2, cr.copyD2U(), PowerPCConditionOperand.UNORDERED(), target, new BranchProfileOperand(0f), new PowerPCConditionOperand(c), (BranchOperand) target.copy(), IfCmp.getClearBranchProfile(s)));
        } else {
            // If branch is effectively a NaN test we just need 1 branch
            EMIT(MIR_CondBranch.create(PPC_BCOND, cr.copyD2U(), new PowerPCConditionOperand(c), target, IfCmp.getClearBranchProfile(s)));
        }
    }
}
Also used : RegisterOperand(org.jikesrvm.compilers.opt.ir.operand.RegisterOperand) PowerPCConditionOperand(org.jikesrvm.compilers.opt.ir.operand.ppc.PowerPCConditionOperand) BranchProfileOperand(org.jikesrvm.compilers.opt.ir.operand.BranchProfileOperand) PowerPCConditionOperand(org.jikesrvm.compilers.opt.ir.operand.ppc.PowerPCConditionOperand) ConditionOperand(org.jikesrvm.compilers.opt.ir.operand.ConditionOperand) BranchOperand(org.jikesrvm.compilers.opt.ir.operand.BranchOperand)

Example 8 with PowerPCConditionOperand

use of org.jikesrvm.compilers.opt.ir.operand.ppc.PowerPCConditionOperand in project JikesRVM by JikesRVM.

the class ComplexLIR2MIRExpansion method long_ifcmp.

private static void long_ifcmp(Instruction s, IR ir) {
    if (VM.VerifyAssertions)
        VM._assert(!IfCmp.getCond(s).isUNSIGNED());
    BasicBlock BB1 = s.getBasicBlock();
    BasicBlock BB3 = BB1.splitNodeAt(s, ir);
    BasicBlock BB2 = BB1.createSubBlock(0, ir);
    BB1.insertOut(BB2);
    BB1.insertOut(BB3);
    BB2.insertOut(BB3);
    ir.cfg.linkInCodeOrder(BB1, BB2);
    ir.cfg.linkInCodeOrder(BB2, BB3);
    // s is in BB1, we'll mutate it and insert in BB3 below.
    s.remove();
    RegisterOperand cr = ir.regpool.makeTempCondition();
    RegisterOperand val1 = (RegisterOperand) IfCmp.getClearVal1(s);
    RegisterOperand val2 = (RegisterOperand) IfCmp.getClearVal2(s);
    RegisterOperand lval1 = L(ir.regpool.getSecondReg(val1.getRegister()));
    RegisterOperand lval2 = L(ir.regpool.getSecondReg(val2.getRegister()));
    PowerPCConditionOperand cond = new PowerPCConditionOperand(IfCmp.getCond(s));
    BB1.appendInstruction(MIR_Binary.create(PPC_CMP, cr, val1, val2));
    BB1.appendInstruction(MIR_CondBranch.create(PPC_BCOND, cr.copyD2U(), PowerPCConditionOperand.NOT_EQUAL(), BB3.makeJumpTarget(), new BranchProfileOperand()));
    BB2.appendInstruction(MIR_Binary.create(PPC_CMPL, cr.copyD2D(), lval1, lval2));
    BB3.prependInstruction(MIR_CondBranch.mutate(s, PPC_BCOND, cr.copyD2U(), cond, IfCmp.getTarget(s), IfCmp.getBranchProfile(s)));
}
Also used : RegisterOperand(org.jikesrvm.compilers.opt.ir.operand.RegisterOperand) PowerPCConditionOperand(org.jikesrvm.compilers.opt.ir.operand.ppc.PowerPCConditionOperand) BasicBlock(org.jikesrvm.compilers.opt.ir.BasicBlock) BranchProfileOperand(org.jikesrvm.compilers.opt.ir.operand.BranchProfileOperand)

Aggregations

PowerPCConditionOperand (org.jikesrvm.compilers.opt.ir.operand.ppc.PowerPCConditionOperand)8 RegisterOperand (org.jikesrvm.compilers.opt.ir.operand.RegisterOperand)7 Operator (org.jikesrvm.compilers.opt.ir.Operator)4 BranchProfileOperand (org.jikesrvm.compilers.opt.ir.operand.BranchProfileOperand)3 BasicBlock (org.jikesrvm.compilers.opt.ir.BasicBlock)2 OsrPoint (org.jikesrvm.compilers.opt.ir.OsrPoint)1 Register (org.jikesrvm.compilers.opt.ir.Register)1 BranchOperand (org.jikesrvm.compilers.opt.ir.operand.BranchOperand)1 ConditionOperand (org.jikesrvm.compilers.opt.ir.operand.ConditionOperand)1 IntConstantOperand (org.jikesrvm.compilers.opt.ir.operand.IntConstantOperand)1