Examples with LLVMAMD64WriteTupelNode com.oracle.truffle.llvm.nodes.asm.support.LLVMAMD64WriteTupelNode used on opensource projects

Example 1 with LLVMAMD64WriteTupelNode

use of com.oracle.truffle.llvm.nodes.asm.support.LLVMAMD64WriteTupelNode in project sulong by graalvm.

the class AsmFactory method createUnaryOperation.

void createUnaryOperation(String operation, AsmOperand operand) {
    LLVMExpressionNode src;
    LLVMExpressionNode out;
    AsmOperand dst = operand;
    Type dstType;
    assert operation.length() > 0;
    char suffix = operation.charAt(operation.length() - 1);
    dstType = getPrimitiveTypeFromSuffix(suffix);
    src = getOperandLoad(dstType, operand);
    switch(operation) {
        case "incb":
            out = LLVMAMD64IncbNodeGen.create(getUpdatePZSOFlagsNode(), src);
            break;
        case "incw":
            out = LLVMAMD64IncwNodeGen.create(getUpdatePZSOFlagsNode(), src);
            break;
        case "incl":
            out = LLVMAMD64InclNodeGen.create(getUpdatePZSOFlagsNode(), src);
            break;
        case "incq":
            out = LLVMAMD64IncqNodeGen.create(getUpdatePZSOFlagsNode(), src);
            break;
        case "decb":
            out = LLVMAMD64DecbNodeGen.create(getUpdatePZSOFlagsNode(), src);
            break;
        case "decw":
            out = LLVMAMD64DecwNodeGen.create(getUpdatePZSOFlagsNode(), src);
            break;
        case "decl":
            out = LLVMAMD64DeclNodeGen.create(getUpdatePZSOFlagsNode(), src);
            break;
        case "decq":
            out = LLVMAMD64DecqNodeGen.create(getUpdatePZSOFlagsNode(), src);
            break;
        case "negb":
            out = LLVMAMD64NegbNodeGen.create(getUpdateCPZSOFlagsNode(), src);
            break;
        case "negw":
            out = LLVMAMD64NegwNodeGen.create(getUpdateCPZSOFlagsNode(), src);
            break;
        case "negl":
            out = LLVMAMD64NeglNodeGen.create(getUpdateCPZSOFlagsNode(), src);
            break;
        case "negq":
            out = LLVMAMD64NegqNodeGen.create(getUpdateCPZSOFlagsNode(), src);
            break;
        case "notb":
            out = LLVMAMD64NotbNodeGen.create(src);
            break;
        case "notw":
            out = LLVMAMD64NotwNodeGen.create(src);
            break;
        case "notl":
            out = LLVMAMD64NotlNodeGen.create(src);
            break;
        case "notq":
            out = LLVMAMD64NotqNodeGen.create(src);
            break;
        case "idivb":
            out = LLVMAMD64IdivbNodeGen.create(getOperandLoad(PrimitiveType.I16, new AsmRegisterOperand("ax")), src);
            dst = new AsmRegisterOperand("ax");
            dstType = PrimitiveType.I16;
            break;
        case "idivw":
            {
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("ax"), getRegisterStore("dx"));
                LLVMExpressionNode high = getOperandLoad(PrimitiveType.I16, new AsmRegisterOperand("dx"));
                out = LLVMAMD64IdivwNodeGen.create(res, high, getOperandLoad(PrimitiveType.I16, new AsmRegisterOperand("ax")), src);
                statements.add(out);
                return;
            }
        case "idivl":
            {
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("eax"), getRegisterStore("edx"));
                LLVMExpressionNode high = getOperandLoad(PrimitiveType.I32, new AsmRegisterOperand("edx"));
                out = LLVMAMD64IdivlNodeGen.create(res, high, getOperandLoad(PrimitiveType.I32, new AsmRegisterOperand("eax")), src);
                statements.add(out);
                return;
            }
        case "idivq":
            {
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("rax"), getRegisterStore("rdx"));
                LLVMExpressionNode high = getOperandLoad(PrimitiveType.I64, new AsmRegisterOperand("rdx"));
                out = LLVMAMD64IdivqNodeGen.create(res, high, getOperandLoad(PrimitiveType.I64, new AsmRegisterOperand("rax")), src);
                statements.add(out);
                return;
            }
        case "imulb":
            out = LLVMAMD64ImulbNodeGen.create(getFlagWrite(LLVMAMD64Flags.CF), getFlagWrite(LLVMAMD64Flags.PF), getFlagWrite(LLVMAMD64Flags.AF), getFlagWrite(LLVMAMD64Flags.ZF), getFlagWrite(LLVMAMD64Flags.SF), getFlagWrite(LLVMAMD64Flags.OF), getOperandLoad(PrimitiveType.I8, new AsmRegisterOperand("al")), src);
            dst = new AsmRegisterOperand("ax");
            dstType = PrimitiveType.I16;
            break;
        case "imulw":
            {
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("ax"), getRegisterStore("dx"));
                out = LLVMAMD64ImulwNodeGen.create(getFlagWrite(LLVMAMD64Flags.CF), getFlagWrite(LLVMAMD64Flags.PF), getFlagWrite(LLVMAMD64Flags.AF), getFlagWrite(LLVMAMD64Flags.ZF), getFlagWrite(LLVMAMD64Flags.SF), getFlagWrite(LLVMAMD64Flags.OF), res, getOperandLoad(PrimitiveType.I16, new AsmRegisterOperand("ax")), src);
                statements.add(out);
                return;
            }
        case "imull":
            {
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("eax"), getRegisterStore("edx"));
                out = LLVMAMD64ImullNodeGen.create(getFlagWrite(LLVMAMD64Flags.CF), getFlagWrite(LLVMAMD64Flags.PF), getFlagWrite(LLVMAMD64Flags.AF), getFlagWrite(LLVMAMD64Flags.ZF), getFlagWrite(LLVMAMD64Flags.SF), getFlagWrite(LLVMAMD64Flags.OF), res, getOperandLoad(PrimitiveType.I32, new AsmRegisterOperand("eax")), src);
                statements.add(out);
                return;
            }
        case "imulq":
            {
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("rax"), getRegisterStore("rdx"));
                out = LLVMAMD64ImulqNodeGen.create(getFlagWrite(LLVMAMD64Flags.CF), getFlagWrite(LLVMAMD64Flags.PF), getFlagWrite(LLVMAMD64Flags.AF), getFlagWrite(LLVMAMD64Flags.ZF), getFlagWrite(LLVMAMD64Flags.SF), getFlagWrite(LLVMAMD64Flags.OF), res, getOperandLoad(PrimitiveType.I64, new AsmRegisterOperand("rax")), src);
                statements.add(out);
                return;
            }
        case "divb":
            out = LLVMAMD64DivbNodeGen.create(getOperandLoad(PrimitiveType.I16, new AsmRegisterOperand("ax")), src);
            dst = new AsmRegisterOperand("ax");
            dstType = PrimitiveType.I16;
            break;
        case "divw":
            {
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("ax"), getRegisterStore("dx"));
                LLVMExpressionNode high = getOperandLoad(PrimitiveType.I16, new AsmRegisterOperand("dx"));
                out = LLVMAMD64DivwNodeGen.create(res, high, getOperandLoad(PrimitiveType.I16, new AsmRegisterOperand("ax")), src);
                statements.add(out);
                return;
            }
        case "divl":
            {
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("eax"), getRegisterStore("edx"));
                LLVMExpressionNode high = getOperandLoad(PrimitiveType.I32, new AsmRegisterOperand("edx"));
                out = LLVMAMD64DivlNodeGen.create(res, high, getOperandLoad(PrimitiveType.I32, new AsmRegisterOperand("eax")), src);
                statements.add(out);
                return;
            }
        case "divq":
            {
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("rax"), getRegisterStore("rdx"));
                LLVMExpressionNode high = getOperandLoad(PrimitiveType.I64, new AsmRegisterOperand("rdx"));
                out = LLVMAMD64DivqNodeGen.create(res, high, getOperandLoad(PrimitiveType.I64, new AsmRegisterOperand("rax")), src);
                statements.add(out);
                return;
            }
        case "mulb":
            out = LLVMAMD64MulbNodeGen.create(getFlagWrite(LLVMAMD64Flags.CF), getFlagWrite(LLVMAMD64Flags.PF), getFlagWrite(LLVMAMD64Flags.AF), getFlagWrite(LLVMAMD64Flags.ZF), getFlagWrite(LLVMAMD64Flags.SF), getFlagWrite(LLVMAMD64Flags.OF), getOperandLoad(PrimitiveType.I8, new AsmRegisterOperand("al")), src);
            dst = new AsmRegisterOperand("ax");
            dstType = PrimitiveType.I16;
            break;
        case "mulw":
            {
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("ax"), getRegisterStore("dx"));
                out = LLVMAMD64MulwNodeGen.create(getFlagWrite(LLVMAMD64Flags.CF), getFlagWrite(LLVMAMD64Flags.PF), getFlagWrite(LLVMAMD64Flags.AF), getFlagWrite(LLVMAMD64Flags.ZF), getFlagWrite(LLVMAMD64Flags.SF), getFlagWrite(LLVMAMD64Flags.OF), res, getOperandLoad(PrimitiveType.I16, new AsmRegisterOperand("ax")), src);
                statements.add(out);
                return;
            }
        case "mull":
            {
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("eax"), getRegisterStore("edx"));
                out = LLVMAMD64MullNodeGen.create(getFlagWrite(LLVMAMD64Flags.CF), getFlagWrite(LLVMAMD64Flags.PF), getFlagWrite(LLVMAMD64Flags.AF), getFlagWrite(LLVMAMD64Flags.ZF), getFlagWrite(LLVMAMD64Flags.SF), getFlagWrite(LLVMAMD64Flags.OF), res, getOperandLoad(PrimitiveType.I32, new AsmRegisterOperand("eax")), src);
                statements.add(out);
                return;
            }
        case "mulq":
            {
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("rax"), getRegisterStore("rdx"));
                out = LLVMAMD64MulqNodeGen.create(getFlagWrite(LLVMAMD64Flags.CF), getFlagWrite(LLVMAMD64Flags.PF), getFlagWrite(LLVMAMD64Flags.AF), getFlagWrite(LLVMAMD64Flags.ZF), getFlagWrite(LLVMAMD64Flags.SF), getFlagWrite(LLVMAMD64Flags.OF), res, getOperandLoad(PrimitiveType.I64, new AsmRegisterOperand("rax")), src);
                statements.add(out);
                return;
            }
        case "bswapl":
            out = LLVMAMD64BswaplNodeGen.create(src);
            break;
        case "bswapq":
            out = LLVMAMD64BswapqNodeGen.create(src);
            break;
        case "popw":
            out = LLVMAMD64PopwNodeGen.create();
            break;
        case "popl":
            out = LLVMAMD64PoplNodeGen.create();
            break;
        case "popq":
            out = LLVMAMD64PopqNodeGen.create();
            break;
        case "pushw":
            statements.add(LLVMAMD64PushwNodeGen.create(src));
            return;
        case "pushl":
            statements.add(LLVMAMD64PushlNodeGen.create(src));
            return;
        case "pushq":
            statements.add(LLVMAMD64PushqNodeGen.create(src));
            return;
        default:
            statements.add(new LLVMUnsupportedInlineAssemblerNode(sourceLocation, "Unsupported operation: " + operation));
            return;
    }
    LLVMExpressionNode write = getOperandStore(dstType, dst, out);
    statements.add(write);
}

Example 2 with LLVMAMD64WriteTupelNode

use of com.oracle.truffle.llvm.nodes.asm.support.LLVMAMD64WriteTupelNode in project sulong by graalvm.

the class AsmFactory method createBinaryOperation.

void createBinaryOperation(String operation, AsmOperand a, AsmOperand b) {
    LLVMExpressionNode srcA;
    LLVMExpressionNode srcB;
    LLVMExpressionNode out;
    assert a != null && b != null;
    AsmOperand dst = b;
    Type dstType;
    char suffix = operation.charAt(operation.length() - 1);
    dstType = getPrimitiveTypeFromSuffix(suffix);
    srcB = getOperandLoad(dstType, b);
    if (isShiftOperation(operation)) {
        srcA = getOperandLoad(PrimitiveType.I8, a);
    } else {
        srcA = getOperandLoad(dstType, a);
    }
    switch(operation) {
        case "addb":
            out = LLVMAMD64AddbNodeGen.create(getUpdateCPZSOFlagsNode(), srcA, srcB);
            break;
        case "addw":
            out = LLVMAMD64AddwNodeGen.create(getUpdateCPZSOFlagsNode(), srcA, srcB);
            break;
        case "addl":
            out = LLVMAMD64AddlNodeGen.create(getUpdateCPZSOFlagsNode(), srcA, srcB);
            break;
        case "addq":
            out = LLVMAMD64AddqNodeGen.create(getUpdateCPZSOFlagsNode(), srcA, srcB);
            break;
        case "adcb":
            out = LLVMAMD64AdcbNodeGen.create(getUpdateCPZSOFlagsNode(), srcA, srcB, getFlag(LLVMAMD64Flags.CF));
            break;
        case "adcw":
            out = LLVMAMD64AdcwNodeGen.create(getUpdateCPZSOFlagsNode(), srcA, srcB, getFlag(LLVMAMD64Flags.CF));
            break;
        case "adcl":
            out = LLVMAMD64AdclNodeGen.create(getUpdateCPZSOFlagsNode(), srcA, srcB, getFlag(LLVMAMD64Flags.CF));
            break;
        case "adcq":
            out = LLVMAMD64AdcqNodeGen.create(getUpdateCPZSOFlagsNode(), srcA, srcB, getFlag(LLVMAMD64Flags.CF));
            break;
        case "subb":
            out = LLVMAMD64SubbNodeGen.create(srcB, srcA);
            break;
        case "subw":
            out = LLVMAMD64SubwNodeGen.create(srcB, srcA);
            break;
        case "subl":
            out = LLVMAMD64SublNodeGen.create(srcB, srcA);
            break;
        case "subq":
            out = LLVMAMD64SubqNodeGen.create(srcB, srcA);
            break;
        case "idivb":
            srcA = getOperandLoad(PrimitiveType.I8, a);
            srcB = getOperandLoad(PrimitiveType.I16, b);
            out = LLVMAMD64IdivbNodeGen.create(srcB, srcA);
            dst = new AsmRegisterOperand("ax");
            dstType = PrimitiveType.I16;
            break;
        case "idivw":
            {
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("ax"), getRegisterStore("dx"));
                LLVMExpressionNode high = getOperandLoad(PrimitiveType.I16, new AsmRegisterOperand("dx"));
                out = LLVMAMD64IdivwNodeGen.create(res, high, srcB, srcA);
                statements.add(out);
                return;
            }
        case "idivl":
            {
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("eax"), getRegisterStore("edx"));
                LLVMExpressionNode high = getOperandLoad(PrimitiveType.I32, new AsmRegisterOperand("edx"));
                out = LLVMAMD64IdivlNodeGen.create(res, high, srcB, srcA);
                statements.add(out);
                return;
            }
        case "idivq":
            {
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("rax"), getRegisterStore("rdx"));
                LLVMExpressionNode high = getOperandLoad(PrimitiveType.I32, new AsmRegisterOperand("rdx"));
                out = LLVMAMD64IdivqNodeGen.create(res, high, srcB, srcA);
                statements.add(out);
                return;
            }
        case "imulw":
            {
                out = LLVMAMD64Imulw3NodeGen.create(getFlagWrite(LLVMAMD64Flags.CF), getFlagWrite(LLVMAMD64Flags.PF), getFlagWrite(LLVMAMD64Flags.AF), getFlagWrite(LLVMAMD64Flags.ZF), getFlagWrite(LLVMAMD64Flags.SF), getFlagWrite(LLVMAMD64Flags.OF), srcA, srcB);
                break;
            }
        case "imull":
            {
                out = LLVMAMD64Imull3NodeGen.create(getFlagWrite(LLVMAMD64Flags.CF), getFlagWrite(LLVMAMD64Flags.PF), getFlagWrite(LLVMAMD64Flags.AF), getFlagWrite(LLVMAMD64Flags.ZF), getFlagWrite(LLVMAMD64Flags.SF), getFlagWrite(LLVMAMD64Flags.OF), srcA, srcB);
                break;
            }
        case "imulq":
            {
                out = LLVMAMD64Imulq3NodeGen.create(getFlagWrite(LLVMAMD64Flags.CF), getFlagWrite(LLVMAMD64Flags.PF), getFlagWrite(LLVMAMD64Flags.AF), getFlagWrite(LLVMAMD64Flags.ZF), getFlagWrite(LLVMAMD64Flags.SF), getFlagWrite(LLVMAMD64Flags.OF), srcA, srcB);
                break;
            }
        case "movb":
        case "movw":
        case "movl":
        case "movq":
            out = srcA;
            break;
        case "movsbw":
            srcA = getOperandLoad(PrimitiveType.I8, a);
            out = LLVMToI16NoZeroExtNodeGen.create(srcA);
            break;
        case "movsbl":
            srcA = getOperandLoad(PrimitiveType.I8, a);
            out = LLVMToI32NoZeroExtNodeGen.create(srcA);
            break;
        case "movsbq":
            srcA = getOperandLoad(PrimitiveType.I8, a);
            out = LLVMToI64NoZeroExtNodeGen.create(srcA);
            break;
        case "movswl":
            srcA = getOperandLoad(PrimitiveType.I16, a);
            out = LLVMToI32NoZeroExtNodeGen.create(srcA);
            break;
        case "movswq":
            srcA = getOperandLoad(PrimitiveType.I16, a);
            out = LLVMToI64NoZeroExtNodeGen.create(srcA);
            break;
        case "movslq":
            srcA = getOperandLoad(PrimitiveType.I32, a);
            out = LLVMToI64NoZeroExtNodeGen.create(srcA);
            break;
        case "movzbw":
            srcA = getOperandLoad(PrimitiveType.I8, a);
            out = LLVMToI16ZeroExtNodeGen.create(srcA);
            break;
        case "movzbl":
            srcA = getOperandLoad(PrimitiveType.I8, a);
            out = LLVMToI32ZeroExtNodeGen.create(srcA);
            break;
        case "movzbq":
            srcA = getOperandLoad(PrimitiveType.I8, a);
            out = LLVMToI64ZeroExtNodeGen.create(srcA);
            break;
        case "movzwl":
            srcA = getOperandLoad(PrimitiveType.I16, a);
            out = LLVMToI32ZeroExtNodeGen.create(srcA);
            break;
        case "movzwq":
            srcA = getOperandLoad(PrimitiveType.I16, a);
            out = LLVMToI64ZeroExtNodeGen.create(srcA);
            break;
        case "salb":
            out = LLVMAMD64SalbNodeGen.create(srcB, srcA);
            break;
        case "salw":
            out = LLVMAMD64SalwNodeGen.create(srcB, srcA);
            break;
        case "sall":
            out = LLVMAMD64SallNodeGen.create(srcB, srcA);
            break;
        case "salq":
            out = LLVMAMD64SalqNodeGen.create(srcB, srcA);
            break;
        case "sarb":
            out = LLVMAMD64SarbNodeGen.create(srcB, srcA);
            break;
        case "sarw":
            out = LLVMAMD64SarwNodeGen.create(srcB, srcA);
            break;
        case "sarl":
            out = LLVMAMD64SarlNodeGen.create(srcB, srcA);
            break;
        case "sarq":
            out = LLVMAMD64SarqNodeGen.create(srcB, srcA);
            break;
        case "shlb":
            out = LLVMAMD64ShlbNodeGen.create(srcB, srcA);
            break;
        case "shlw":
            out = LLVMAMD64ShlwNodeGen.create(srcB, srcA);
            break;
        case "shll":
            out = LLVMAMD64ShllNodeGen.create(srcB, srcA);
            break;
        case "shlq":
            out = LLVMAMD64ShlqNodeGen.create(srcB, srcA);
            break;
        case "shrb":
            out = LLVMAMD64ShrbNodeGen.create(srcB, srcA);
            break;
        case "shrw":
            out = LLVMAMD64ShrwNodeGen.create(srcB, srcA);
            break;
        case "shrl":
            out = LLVMAMD64ShrlNodeGen.create(srcB, srcA);
            break;
        case "shrq":
            out = LLVMAMD64ShrqNodeGen.create(srcB, srcA);
            break;
        case "rolb":
            out = LLVMAMD64RolbNodeGen.create(srcB, srcA);
            break;
        case "rolw":
            out = LLVMAMD64RolwNodeGen.create(srcB, srcA);
            break;
        case "roll":
            out = LLVMAMD64RollNodeGen.create(srcB, srcA);
            break;
        case "rolq":
            out = LLVMAMD64RolqNodeGen.create(srcB, srcA);
            break;
        case "rorb":
            out = LLVMAMD64RorbNodeGen.create(srcB, srcA);
            break;
        case "rorw":
            out = LLVMAMD64RorwNodeGen.create(srcB, srcA);
            break;
        case "rorl":
            out = LLVMAMD64RorlNodeGen.create(srcB, srcA);
            break;
        case "rorq":
            out = LLVMAMD64RorqNodeGen.create(srcB, srcA);
            break;
        case "andb":
            out = LLVMAMD64AndbNodeGen.create(getUpdatePZSFlagsNode(), srcA, srcB);
            break;
        case "andw":
            out = LLVMAMD64AndwNodeGen.create(getUpdatePZSFlagsNode(), srcA, srcB);
            break;
        case "andl":
            out = LLVMAMD64AndlNodeGen.create(getUpdatePZSFlagsNode(), srcA, srcB);
            break;
        case "andq":
            out = LLVMAMD64AndqNodeGen.create(getUpdatePZSFlagsNode(), srcA, srcB);
            break;
        case "orb":
            out = LLVMAMD64OrbNodeGen.create(srcA, srcB);
            break;
        case "orw":
            out = LLVMAMD64OrwNodeGen.create(srcA, srcB);
            break;
        case "orl":
            out = LLVMAMD64OrlNodeGen.create(srcA, srcB);
            break;
        case "orq":
            out = LLVMAMD64OrqNodeGen.create(srcA, srcB);
            break;
        case "xchgb":
            {
                XchgOperands operands = new XchgOperands(a, b, dstType);
                out = LLVMAMD64XchgbNodeGen.create(operands.dst, operands.srcA, operands.srcB);
                statements.add(out);
                return;
            }
        case "xchgw":
            {
                XchgOperands operands = new XchgOperands(a, b, dstType);
                out = LLVMAMD64XchgwNodeGen.create(operands.dst, operands.srcA, operands.srcB);
                statements.add(out);
                return;
            }
        case "xchgl":
            {
                XchgOperands operands = new XchgOperands(a, b, dstType);
                out = LLVMAMD64XchglNodeGen.create(operands.dst, operands.srcA, operands.srcB);
                statements.add(out);
                return;
            }
        case "xchgq":
            {
                XchgOperands operands = new XchgOperands(a, b, dstType);
                out = LLVMAMD64XchgqNodeGen.create(operands.dst, operands.srcA, operands.srcB);
                statements.add(out);
                return;
            }
        case "cmpb":
            statements.add(LLVMAMD64CmpbNodeGen.create(getUpdateCPAZSOFlagsNode(), srcB, srcA));
            return;
        case "cmpw":
            statements.add(LLVMAMD64CmpwNodeGen.create(getUpdateCPAZSOFlagsNode(), srcB, srcA));
            return;
        case "cmpl":
            statements.add(LLVMAMD64CmplNodeGen.create(getUpdateCPAZSOFlagsNode(), srcB, srcA));
            return;
        case "cmpq":
            statements.add(LLVMAMD64CmpqNodeGen.create(getUpdateCPAZSOFlagsNode(), srcB, srcA));
            return;
        case "cmpxchgb":
            {
                LLVMAMD64WriteValueNode dst1 = getStore(dstType, b);
                LLVMAMD64WriteValueNode dst2 = getRegisterStore("al");
                LLVMExpressionNode accumulator = getOperandLoad(PrimitiveType.I8, new AsmRegisterOperand("al"));
                out = LLVMAMD64CmpXchgbNodeGen.create(getUpdateCPAZSOFlagsNode(), dst1, dst2, accumulator, srcA, srcB);
                statements.add(out);
                return;
            }
        case "cmpxchgw":
            {
                LLVMAMD64WriteValueNode dst1 = getStore(dstType, b);
                LLVMAMD64WriteValueNode dst2 = getRegisterStore("ax");
                LLVMExpressionNode accumulator = getOperandLoad(PrimitiveType.I16, new AsmRegisterOperand("ax"));
                out = LLVMAMD64CmpXchgwNodeGen.create(getUpdateCPAZSOFlagsNode(), dst1, dst2, accumulator, srcA, srcB);
                statements.add(out);
                return;
            }
        case "cmpxchgl":
            {
                LLVMAMD64WriteValueNode dst1 = getStore(dstType, b);
                LLVMAMD64WriteValueNode dst2 = getRegisterStore("eax");
                LLVMExpressionNode accumulator = getOperandLoad(PrimitiveType.I32, new AsmRegisterOperand("eax"));
                out = LLVMAMD64CmpXchglNodeGen.create(getUpdateCPAZSOFlagsNode(), dst1, dst2, accumulator, srcA, srcB);
                statements.add(out);
                return;
            }
        case "cmpxchgq":
            {
                LLVMAMD64WriteValueNode dst1 = getStore(dstType, b);
                LLVMAMD64WriteValueNode dst2 = getRegisterStore("rax");
                LLVMExpressionNode accumulator = getOperandLoad(PrimitiveType.I64, new AsmRegisterOperand("rax"));
                out = LLVMAMD64CmpXchgqNodeGen.create(getUpdateCPAZSOFlagsNode(), dst1, dst2, accumulator, srcA, srcB);
                statements.add(out);
                return;
            }
        case "xaddb":
            {
                LLVMAMD64WriteValueNode dst1 = getRegisterStore(PrimitiveType.I8, a);
                LLVMAMD64WriteValueNode dst2 = getStore(dstType, dst);
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(dst1, dst2);
                out = LLVMAMD64XaddbNodeGen.create(getUpdateCPZSOFlagsNode(), res, srcA, srcB);
                statements.add(out);
                return;
            }
        case "xaddw":
            {
                LLVMAMD64WriteValueNode dst1 = getRegisterStore(PrimitiveType.I16, a);
                LLVMAMD64WriteValueNode dst2 = getStore(dstType, dst);
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(dst1, dst2);
                out = LLVMAMD64XaddwNodeGen.create(getUpdateCPZSOFlagsNode(), res, srcA, srcB);
                statements.add(out);
                return;
            }
        case "xaddl":
            {
                LLVMAMD64WriteValueNode dst1 = getRegisterStore(PrimitiveType.I32, a);
                LLVMAMD64WriteValueNode dst2 = getStore(dstType, dst);
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(dst1, dst2);
                out = LLVMAMD64XaddlNodeGen.create(getUpdateCPZSOFlagsNode(), res, srcA, srcB);
                statements.add(out);
                return;
            }
        case "xaddq":
            {
                LLVMAMD64WriteValueNode dst1 = getRegisterStore(PrimitiveType.I64, a);
                LLVMAMD64WriteValueNode dst2 = getStore(dstType, dst);
                LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(dst1, dst2);
                out = LLVMAMD64XaddqNodeGen.create(getUpdateCPZSOFlagsNode(), res, srcA, srcB);
                statements.add(out);
                return;
            }
        case "xorb":
            out = LLVMAMD64XorbNodeGen.create(srcA, srcB);
            break;
        case "xorw":
            out = LLVMAMD64XorwNodeGen.create(srcA, srcB);
            break;
        case "xorl":
            out = LLVMAMD64XorlNodeGen.create(srcA, srcB);
            break;
        case "xorq":
            out = LLVMAMD64XorqNodeGen.create(srcA, srcB);
            break;
        case "bsrw":
            out = LLVMAMD64BsrwNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
            break;
        case "bsrl":
            out = LLVMAMD64BsrlNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
            break;
        case "bsrq":
            out = LLVMAMD64BsrqNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
            break;
        case "bsfw":
            out = LLVMAMD64BsfwNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
            break;
        case "bsfl":
            out = LLVMAMD64BsflNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
            break;
        case "bsfq":
            out = LLVMAMD64BsfqNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
            break;
        default:
            statements.add(new LLVMUnsupportedInlineAssemblerNode(sourceLocation, "Unsupported operation: " + operation));
            return;
    }
    LLVMExpressionNode write = getOperandStore(dstType, dst, out);
    statements.add(write);
}