use of com.oracle.truffle.llvm.nodes.asm.support.LLVMAMD64WriteValueNode in project sulong by graalvm.
the class AsmFactory method createRep.
private void createRep(LLVMExpressionNode body) {
if ("rep".equals(currentPrefix)) {
LLVMExpressionNode rcx = getOperandLoad(PrimitiveType.I64, new AsmRegisterOperand("rcx"));
LLVMAMD64WriteValueNode writeRCX = getStore(PrimitiveType.I64, new AsmRegisterOperand("rcx"));
LLVMExpressionNode rep = new LLVMAMD64RepNode(writeRCX, rcx, body);
statements.add(rep);
} else {
statements.add(body);
}
}
use of com.oracle.truffle.llvm.nodes.asm.support.LLVMAMD64WriteValueNode in project sulong by graalvm.
the class AsmFactory method createBinaryOperation.
void createBinaryOperation(String operation, AsmOperand a, AsmOperand b) {
LLVMExpressionNode srcA;
LLVMExpressionNode srcB;
LLVMExpressionNode out;
assert a != null && b != null;
AsmOperand dst = b;
Type dstType;
char suffix = operation.charAt(operation.length() - 1);
dstType = getPrimitiveTypeFromSuffix(suffix);
srcB = getOperandLoad(dstType, b);
if (isShiftOperation(operation)) {
srcA = getOperandLoad(PrimitiveType.I8, a);
} else {
srcA = getOperandLoad(dstType, a);
}
switch(operation) {
case "addb":
out = LLVMAMD64AddbNodeGen.create(getUpdateCPZSOFlagsNode(), srcA, srcB);
break;
case "addw":
out = LLVMAMD64AddwNodeGen.create(getUpdateCPZSOFlagsNode(), srcA, srcB);
break;
case "addl":
out = LLVMAMD64AddlNodeGen.create(getUpdateCPZSOFlagsNode(), srcA, srcB);
break;
case "addq":
out = LLVMAMD64AddqNodeGen.create(getUpdateCPZSOFlagsNode(), srcA, srcB);
break;
case "adcb":
out = LLVMAMD64AdcbNodeGen.create(getUpdateCPZSOFlagsNode(), srcA, srcB, getFlag(LLVMAMD64Flags.CF));
break;
case "adcw":
out = LLVMAMD64AdcwNodeGen.create(getUpdateCPZSOFlagsNode(), srcA, srcB, getFlag(LLVMAMD64Flags.CF));
break;
case "adcl":
out = LLVMAMD64AdclNodeGen.create(getUpdateCPZSOFlagsNode(), srcA, srcB, getFlag(LLVMAMD64Flags.CF));
break;
case "adcq":
out = LLVMAMD64AdcqNodeGen.create(getUpdateCPZSOFlagsNode(), srcA, srcB, getFlag(LLVMAMD64Flags.CF));
break;
case "subb":
out = LLVMAMD64SubbNodeGen.create(srcB, srcA);
break;
case "subw":
out = LLVMAMD64SubwNodeGen.create(srcB, srcA);
break;
case "subl":
out = LLVMAMD64SublNodeGen.create(srcB, srcA);
break;
case "subq":
out = LLVMAMD64SubqNodeGen.create(srcB, srcA);
break;
case "idivb":
srcA = getOperandLoad(PrimitiveType.I8, a);
srcB = getOperandLoad(PrimitiveType.I16, b);
out = LLVMAMD64IdivbNodeGen.create(srcB, srcA);
dst = new AsmRegisterOperand("ax");
dstType = PrimitiveType.I16;
break;
case "idivw":
{
LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("ax"), getRegisterStore("dx"));
LLVMExpressionNode high = getOperandLoad(PrimitiveType.I16, new AsmRegisterOperand("dx"));
out = LLVMAMD64IdivwNodeGen.create(res, high, srcB, srcA);
statements.add(out);
return;
}
case "idivl":
{
LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("eax"), getRegisterStore("edx"));
LLVMExpressionNode high = getOperandLoad(PrimitiveType.I32, new AsmRegisterOperand("edx"));
out = LLVMAMD64IdivlNodeGen.create(res, high, srcB, srcA);
statements.add(out);
return;
}
case "idivq":
{
LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(getRegisterStore("rax"), getRegisterStore("rdx"));
LLVMExpressionNode high = getOperandLoad(PrimitiveType.I32, new AsmRegisterOperand("rdx"));
out = LLVMAMD64IdivqNodeGen.create(res, high, srcB, srcA);
statements.add(out);
return;
}
case "imulw":
{
out = LLVMAMD64Imulw3NodeGen.create(getFlagWrite(LLVMAMD64Flags.CF), getFlagWrite(LLVMAMD64Flags.PF), getFlagWrite(LLVMAMD64Flags.AF), getFlagWrite(LLVMAMD64Flags.ZF), getFlagWrite(LLVMAMD64Flags.SF), getFlagWrite(LLVMAMD64Flags.OF), srcA, srcB);
break;
}
case "imull":
{
out = LLVMAMD64Imull3NodeGen.create(getFlagWrite(LLVMAMD64Flags.CF), getFlagWrite(LLVMAMD64Flags.PF), getFlagWrite(LLVMAMD64Flags.AF), getFlagWrite(LLVMAMD64Flags.ZF), getFlagWrite(LLVMAMD64Flags.SF), getFlagWrite(LLVMAMD64Flags.OF), srcA, srcB);
break;
}
case "imulq":
{
out = LLVMAMD64Imulq3NodeGen.create(getFlagWrite(LLVMAMD64Flags.CF), getFlagWrite(LLVMAMD64Flags.PF), getFlagWrite(LLVMAMD64Flags.AF), getFlagWrite(LLVMAMD64Flags.ZF), getFlagWrite(LLVMAMD64Flags.SF), getFlagWrite(LLVMAMD64Flags.OF), srcA, srcB);
break;
}
case "movb":
case "movw":
case "movl":
case "movq":
out = srcA;
break;
case "movsbw":
srcA = getOperandLoad(PrimitiveType.I8, a);
out = LLVMToI16NoZeroExtNodeGen.create(srcA);
break;
case "movsbl":
srcA = getOperandLoad(PrimitiveType.I8, a);
out = LLVMToI32NoZeroExtNodeGen.create(srcA);
break;
case "movsbq":
srcA = getOperandLoad(PrimitiveType.I8, a);
out = LLVMToI64NoZeroExtNodeGen.create(srcA);
break;
case "movswl":
srcA = getOperandLoad(PrimitiveType.I16, a);
out = LLVMToI32NoZeroExtNodeGen.create(srcA);
break;
case "movswq":
srcA = getOperandLoad(PrimitiveType.I16, a);
out = LLVMToI64NoZeroExtNodeGen.create(srcA);
break;
case "movslq":
srcA = getOperandLoad(PrimitiveType.I32, a);
out = LLVMToI64NoZeroExtNodeGen.create(srcA);
break;
case "movzbw":
srcA = getOperandLoad(PrimitiveType.I8, a);
out = LLVMToI16ZeroExtNodeGen.create(srcA);
break;
case "movzbl":
srcA = getOperandLoad(PrimitiveType.I8, a);
out = LLVMToI32ZeroExtNodeGen.create(srcA);
break;
case "movzbq":
srcA = getOperandLoad(PrimitiveType.I8, a);
out = LLVMToI64ZeroExtNodeGen.create(srcA);
break;
case "movzwl":
srcA = getOperandLoad(PrimitiveType.I16, a);
out = LLVMToI32ZeroExtNodeGen.create(srcA);
break;
case "movzwq":
srcA = getOperandLoad(PrimitiveType.I16, a);
out = LLVMToI64ZeroExtNodeGen.create(srcA);
break;
case "salb":
out = LLVMAMD64SalbNodeGen.create(srcB, srcA);
break;
case "salw":
out = LLVMAMD64SalwNodeGen.create(srcB, srcA);
break;
case "sall":
out = LLVMAMD64SallNodeGen.create(srcB, srcA);
break;
case "salq":
out = LLVMAMD64SalqNodeGen.create(srcB, srcA);
break;
case "sarb":
out = LLVMAMD64SarbNodeGen.create(srcB, srcA);
break;
case "sarw":
out = LLVMAMD64SarwNodeGen.create(srcB, srcA);
break;
case "sarl":
out = LLVMAMD64SarlNodeGen.create(srcB, srcA);
break;
case "sarq":
out = LLVMAMD64SarqNodeGen.create(srcB, srcA);
break;
case "shlb":
out = LLVMAMD64ShlbNodeGen.create(srcB, srcA);
break;
case "shlw":
out = LLVMAMD64ShlwNodeGen.create(srcB, srcA);
break;
case "shll":
out = LLVMAMD64ShllNodeGen.create(srcB, srcA);
break;
case "shlq":
out = LLVMAMD64ShlqNodeGen.create(srcB, srcA);
break;
case "shrb":
out = LLVMAMD64ShrbNodeGen.create(srcB, srcA);
break;
case "shrw":
out = LLVMAMD64ShrwNodeGen.create(srcB, srcA);
break;
case "shrl":
out = LLVMAMD64ShrlNodeGen.create(srcB, srcA);
break;
case "shrq":
out = LLVMAMD64ShrqNodeGen.create(srcB, srcA);
break;
case "rolb":
out = LLVMAMD64RolbNodeGen.create(srcB, srcA);
break;
case "rolw":
out = LLVMAMD64RolwNodeGen.create(srcB, srcA);
break;
case "roll":
out = LLVMAMD64RollNodeGen.create(srcB, srcA);
break;
case "rolq":
out = LLVMAMD64RolqNodeGen.create(srcB, srcA);
break;
case "rorb":
out = LLVMAMD64RorbNodeGen.create(srcB, srcA);
break;
case "rorw":
out = LLVMAMD64RorwNodeGen.create(srcB, srcA);
break;
case "rorl":
out = LLVMAMD64RorlNodeGen.create(srcB, srcA);
break;
case "rorq":
out = LLVMAMD64RorqNodeGen.create(srcB, srcA);
break;
case "andb":
out = LLVMAMD64AndbNodeGen.create(getUpdatePZSFlagsNode(), srcA, srcB);
break;
case "andw":
out = LLVMAMD64AndwNodeGen.create(getUpdatePZSFlagsNode(), srcA, srcB);
break;
case "andl":
out = LLVMAMD64AndlNodeGen.create(getUpdatePZSFlagsNode(), srcA, srcB);
break;
case "andq":
out = LLVMAMD64AndqNodeGen.create(getUpdatePZSFlagsNode(), srcA, srcB);
break;
case "orb":
out = LLVMAMD64OrbNodeGen.create(srcA, srcB);
break;
case "orw":
out = LLVMAMD64OrwNodeGen.create(srcA, srcB);
break;
case "orl":
out = LLVMAMD64OrlNodeGen.create(srcA, srcB);
break;
case "orq":
out = LLVMAMD64OrqNodeGen.create(srcA, srcB);
break;
case "xchgb":
{
XchgOperands operands = new XchgOperands(a, b, dstType);
out = LLVMAMD64XchgbNodeGen.create(operands.dst, operands.srcA, operands.srcB);
statements.add(out);
return;
}
case "xchgw":
{
XchgOperands operands = new XchgOperands(a, b, dstType);
out = LLVMAMD64XchgwNodeGen.create(operands.dst, operands.srcA, operands.srcB);
statements.add(out);
return;
}
case "xchgl":
{
XchgOperands operands = new XchgOperands(a, b, dstType);
out = LLVMAMD64XchglNodeGen.create(operands.dst, operands.srcA, operands.srcB);
statements.add(out);
return;
}
case "xchgq":
{
XchgOperands operands = new XchgOperands(a, b, dstType);
out = LLVMAMD64XchgqNodeGen.create(operands.dst, operands.srcA, operands.srcB);
statements.add(out);
return;
}
case "cmpb":
statements.add(LLVMAMD64CmpbNodeGen.create(getUpdateCPAZSOFlagsNode(), srcB, srcA));
return;
case "cmpw":
statements.add(LLVMAMD64CmpwNodeGen.create(getUpdateCPAZSOFlagsNode(), srcB, srcA));
return;
case "cmpl":
statements.add(LLVMAMD64CmplNodeGen.create(getUpdateCPAZSOFlagsNode(), srcB, srcA));
return;
case "cmpq":
statements.add(LLVMAMD64CmpqNodeGen.create(getUpdateCPAZSOFlagsNode(), srcB, srcA));
return;
case "cmpxchgb":
{
LLVMAMD64WriteValueNode dst1 = getStore(dstType, b);
LLVMAMD64WriteValueNode dst2 = getRegisterStore("al");
LLVMExpressionNode accumulator = getOperandLoad(PrimitiveType.I8, new AsmRegisterOperand("al"));
out = LLVMAMD64CmpXchgbNodeGen.create(getUpdateCPAZSOFlagsNode(), dst1, dst2, accumulator, srcA, srcB);
statements.add(out);
return;
}
case "cmpxchgw":
{
LLVMAMD64WriteValueNode dst1 = getStore(dstType, b);
LLVMAMD64WriteValueNode dst2 = getRegisterStore("ax");
LLVMExpressionNode accumulator = getOperandLoad(PrimitiveType.I16, new AsmRegisterOperand("ax"));
out = LLVMAMD64CmpXchgwNodeGen.create(getUpdateCPAZSOFlagsNode(), dst1, dst2, accumulator, srcA, srcB);
statements.add(out);
return;
}
case "cmpxchgl":
{
LLVMAMD64WriteValueNode dst1 = getStore(dstType, b);
LLVMAMD64WriteValueNode dst2 = getRegisterStore("eax");
LLVMExpressionNode accumulator = getOperandLoad(PrimitiveType.I32, new AsmRegisterOperand("eax"));
out = LLVMAMD64CmpXchglNodeGen.create(getUpdateCPAZSOFlagsNode(), dst1, dst2, accumulator, srcA, srcB);
statements.add(out);
return;
}
case "cmpxchgq":
{
LLVMAMD64WriteValueNode dst1 = getStore(dstType, b);
LLVMAMD64WriteValueNode dst2 = getRegisterStore("rax");
LLVMExpressionNode accumulator = getOperandLoad(PrimitiveType.I64, new AsmRegisterOperand("rax"));
out = LLVMAMD64CmpXchgqNodeGen.create(getUpdateCPAZSOFlagsNode(), dst1, dst2, accumulator, srcA, srcB);
statements.add(out);
return;
}
case "xaddb":
{
LLVMAMD64WriteValueNode dst1 = getRegisterStore(PrimitiveType.I8, a);
LLVMAMD64WriteValueNode dst2 = getStore(dstType, dst);
LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(dst1, dst2);
out = LLVMAMD64XaddbNodeGen.create(getUpdateCPZSOFlagsNode(), res, srcA, srcB);
statements.add(out);
return;
}
case "xaddw":
{
LLVMAMD64WriteValueNode dst1 = getRegisterStore(PrimitiveType.I16, a);
LLVMAMD64WriteValueNode dst2 = getStore(dstType, dst);
LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(dst1, dst2);
out = LLVMAMD64XaddwNodeGen.create(getUpdateCPZSOFlagsNode(), res, srcA, srcB);
statements.add(out);
return;
}
case "xaddl":
{
LLVMAMD64WriteValueNode dst1 = getRegisterStore(PrimitiveType.I32, a);
LLVMAMD64WriteValueNode dst2 = getStore(dstType, dst);
LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(dst1, dst2);
out = LLVMAMD64XaddlNodeGen.create(getUpdateCPZSOFlagsNode(), res, srcA, srcB);
statements.add(out);
return;
}
case "xaddq":
{
LLVMAMD64WriteValueNode dst1 = getRegisterStore(PrimitiveType.I64, a);
LLVMAMD64WriteValueNode dst2 = getStore(dstType, dst);
LLVMAMD64WriteTupelNode res = LLVMAMD64WriteTupelNodeGen.create(dst1, dst2);
out = LLVMAMD64XaddqNodeGen.create(getUpdateCPZSOFlagsNode(), res, srcA, srcB);
statements.add(out);
return;
}
case "xorb":
out = LLVMAMD64XorbNodeGen.create(srcA, srcB);
break;
case "xorw":
out = LLVMAMD64XorwNodeGen.create(srcA, srcB);
break;
case "xorl":
out = LLVMAMD64XorlNodeGen.create(srcA, srcB);
break;
case "xorq":
out = LLVMAMD64XorqNodeGen.create(srcA, srcB);
break;
case "bsrw":
out = LLVMAMD64BsrwNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
break;
case "bsrl":
out = LLVMAMD64BsrlNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
break;
case "bsrq":
out = LLVMAMD64BsrqNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
break;
case "bsfw":
out = LLVMAMD64BsfwNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
break;
case "bsfl":
out = LLVMAMD64BsflNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
break;
case "bsfq":
out = LLVMAMD64BsfqNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
break;
default:
statements.add(new LLVMUnsupportedInlineAssemblerNode(sourceLocation, "Unsupported operation: " + operation));
return;
}
LLVMExpressionNode write = getOperandStore(dstType, dst, out);
statements.add(write);
}
use of com.oracle.truffle.llvm.nodes.asm.support.LLVMAMD64WriteValueNode in project sulong by graalvm.
the class AsmFactory method createBinaryOperationImplicitSize.
void createBinaryOperationImplicitSize(String operation, AsmOperand a, AsmOperand b) {
AsmOperand dst = b;
AsmOperand src = a;
assert a != null && b != null;
Type dstType = getType(b, a);
PrimitiveType.PrimitiveKind dstPrimitiveType = (dstType instanceof PrimitiveType) ? ((PrimitiveType) dstType).getPrimitiveKind() : null;
LLVMExpressionNode out;
switch(operation) {
case "lea":
out = getOperandAddress(dstType, src);
if (isLeaPointer(src)) {
dstType = new PointerType(dstType);
}
break;
case "xor":
if (dstType instanceof PrimitiveType) {
LLVMExpressionNode srcA = getOperandLoad(dstType, a);
LLVMExpressionNode srcB = getOperandLoad(dstType, b);
switch(dstPrimitiveType) {
case I8:
out = LLVMAMD64XorbNodeGen.create(srcA, srcB);
break;
case I16:
out = LLVMAMD64XorwNodeGen.create(srcA, srcB);
break;
case I32:
out = LLVMAMD64XorlNodeGen.create(srcA, srcB);
break;
case I64:
out = LLVMAMD64XorqNodeGen.create(srcA, srcB);
break;
default:
throw new AsmParseException("invalid operand type: " + dstType);
}
} else {
throw new AsmParseException("invalid operand type: " + dstType);
}
break;
case "mov":
if (dstType instanceof PrimitiveType) {
LLVMExpressionNode srcA = getOperandLoad(dstType, a);
out = srcA;
} else if (dstType instanceof PointerType) {
LLVMExpressionNode srcA = getOperandLoad(dstType, a);
out = srcA;
} else {
throw new AsmParseException("invalid operand type: " + dstType);
}
break;
case "bsr":
if (dstType instanceof PrimitiveType) {
LLVMExpressionNode srcA = getOperandLoad(dstType, a);
LLVMExpressionNode srcB = getOperandLoad(dstType, b);
switch(dstPrimitiveType) {
case I16:
out = LLVMAMD64BsrwNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
break;
case I32:
out = LLVMAMD64BsrlNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
break;
case I64:
out = LLVMAMD64BsrqNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
break;
default:
throw new AsmParseException("invalid operand type: " + dstType);
}
} else {
throw new AsmParseException("invalid operand type: " + dstType);
}
break;
case "bsf":
if (dstType instanceof PrimitiveType) {
LLVMExpressionNode srcA = getOperandLoad(dstType, a);
LLVMExpressionNode srcB = getOperandLoad(dstType, b);
switch(dstPrimitiveType) {
case I16:
out = LLVMAMD64BsfwNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
break;
case I32:
out = LLVMAMD64BsflNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
break;
case I64:
out = LLVMAMD64BsfqNodeGen.create(getFlagWrite(LLVMAMD64Flags.ZF), srcA, srcB);
break;
default:
throw new AsmParseException("invalid operand type: " + dstType);
}
} else {
throw new AsmParseException("invalid operand type: " + dstType);
}
break;
case "xchg":
{
if (dstType instanceof PrimitiveType) {
XchgOperands operands = new XchgOperands(a, b, dstType);
switch(dstPrimitiveType) {
case I8:
out = LLVMAMD64XchgbNodeGen.create(operands.dst, operands.srcA, operands.srcB);
break;
case I16:
out = LLVMAMD64XchgwNodeGen.create(operands.dst, operands.srcA, operands.srcB);
break;
case I32:
out = LLVMAMD64XchglNodeGen.create(operands.dst, operands.srcA, operands.srcB);
break;
case I64:
out = LLVMAMD64XchgqNodeGen.create(operands.dst, operands.srcA, operands.srcB);
break;
default:
throw new AsmParseException("invalid operand type: " + dstType);
}
statements.add(out);
return;
} else {
throw new AsmParseException("invalid operand type: " + dstType);
}
}
case "cmpxchg":
{
if (dstType instanceof PointerType) {
// treat pointers as I64
dstPrimitiveType = PrimitiveKind.I64;
}
if (dstType instanceof PrimitiveType || dstType instanceof PointerType) {
LLVMExpressionNode srcA = getOperandLoad(dstType, a);
LLVMExpressionNode srcB = getOperandLoad(dstType, b);
LLVMAMD64WriteValueNode dst1 = getStore(dstType, b);
LLVMAMD64WriteValueNode dst2;
LLVMExpressionNode accumulator;
if (dstType instanceof PointerType) {
dst2 = getRegisterStore("rax");
accumulator = getOperandLoad(new PointerType(PrimitiveType.I8), new AsmRegisterOperand("rax"));
out = LLVMAMD64CmpXchgqNodeGen.create(getUpdateCPAZSOFlagsNode(), dst1, dst2, accumulator, srcA, srcB);
} else {
switch(dstPrimitiveType) {
case I8:
dst2 = getRegisterStore("al");
accumulator = getOperandLoad(PrimitiveType.I8, new AsmRegisterOperand("al"));
out = LLVMAMD64CmpXchgbNodeGen.create(getUpdateCPAZSOFlagsNode(), dst1, dst2, accumulator, srcA, srcB);
break;
case I16:
dst2 = getRegisterStore("ax");
accumulator = getOperandLoad(PrimitiveType.I16, new AsmRegisterOperand("ax"));
out = LLVMAMD64CmpXchgwNodeGen.create(getUpdateCPAZSOFlagsNode(), dst1, dst2, accumulator, srcA, srcB);
break;
case I32:
dst2 = getRegisterStore("eax");
accumulator = getOperandLoad(PrimitiveType.I32, new AsmRegisterOperand("eax"));
out = LLVMAMD64CmpXchglNodeGen.create(getUpdateCPAZSOFlagsNode(), dst1, dst2, accumulator, srcA, srcB);
break;
case I64:
dst2 = getRegisterStore("rax");
accumulator = getOperandLoad(PrimitiveType.I64, new AsmRegisterOperand("rax"));
out = LLVMAMD64CmpXchgqNodeGen.create(getUpdateCPAZSOFlagsNode(), dst1, dst2, accumulator, srcA, srcB);
break;
default:
throw new AsmParseException("invalid operand type: " + dstType);
}
}
statements.add(out);
return;
} else {
throw new AsmParseException("invalid operand type: " + dstType);
}
}
case "and":
if (dstType instanceof PrimitiveType) {
LLVMExpressionNode srcA = getOperandLoad(dstType, a);
LLVMExpressionNode srcB = getOperandLoad(dstType, b);
switch(dstPrimitiveType) {
case I8:
out = LLVMAMD64AndbNodeGen.create(getUpdatePZSFlagsNode(), srcA, srcB);
break;
case I16:
out = LLVMAMD64AndwNodeGen.create(getUpdatePZSFlagsNode(), srcA, srcB);
break;
case I32:
out = LLVMAMD64AndlNodeGen.create(getUpdatePZSFlagsNode(), srcA, srcB);
break;
case I64:
out = LLVMAMD64AndqNodeGen.create(getUpdatePZSFlagsNode(), srcA, srcB);
break;
default:
throw new AsmParseException("invalid operand type: " + dstType);
}
} else {
throw new AsmParseException("invalid operand type: " + dstType);
}
break;
case "or":
if (dstType instanceof PrimitiveType) {
LLVMExpressionNode srcA = getOperandLoad(dstType, a);
LLVMExpressionNode srcB = getOperandLoad(dstType, b);
switch(dstPrimitiveType) {
case I8:
out = LLVMAMD64OrbNodeGen.create(srcA, srcB);
break;
case I16:
out = LLVMAMD64OrwNodeGen.create(srcA, srcB);
break;
case I32:
out = LLVMAMD64OrlNodeGen.create(srcA, srcB);
break;
case I64:
out = LLVMAMD64OrqNodeGen.create(srcA, srcB);
break;
default:
throw new AsmParseException("invalid operand type: " + dstType);
}
} else {
throw new AsmParseException("invalid operand type: " + dstType);
}
break;
default:
statements.add(new LLVMUnsupportedInlineAssemblerNode(sourceLocation, "Unsupported operation: " + operation));
return;
}
LLVMExpressionNode write = getOperandStore(dstType, dst, out);
statements.add(write);
}
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