Examples with Register org.jikesrvm.compilers.opt.ir.Register used on opensource projects

Example 16 with Register

use of org.jikesrvm.compilers.opt.ir.Register in project JikesRVM by JikesRVM.

the class BURS_Helpers method LONG_NEG.

protected final void LONG_NEG(Instruction s, RegisterOperand def, RegisterOperand left) {
    if (VM.BuildFor32Addr) {
        Register defReg = def.getRegister();
        Register leftReg = left.getRegister();
        EMIT(MIR_Binary.create(PPC_SUBFIC, I(regpool.getSecondReg(defReg)), I(regpool.getSecondReg(leftReg)), IC(0)));
        EMIT(MIR_Unary.create(PPC_SUBFZE, I(defReg), I(leftReg)));
    } else {
        if (VM.VerifyAssertions)
            VM._assert(VM.NOT_REACHED);
    }
}

Example 17 with Register

use of org.jikesrvm.compilers.opt.ir.Register in project JikesRVM by JikesRVM.

the class BURS_Helpers method RETURN.

protected final void RETURN(Instruction s, Operand value) {
    if (value != null) {
        RegisterOperand rop = (RegisterOperand) value;
        if (VM.BuildFor32Addr && value.getType().isLongType()) {
            Register pair = regpool.getSecondReg(rop.getRegister());
            EMIT(MIR_Return.mutate(s, PPC_BLR, rop.copyU2U(), I(pair)));
        } else {
            EMIT(MIR_Return.mutate(s, PPC_BLR, rop.copyU2U(), null));
        }
    } else {
        EMIT(MIR_Return.mutate(s, PPC_BLR, null, null));
    }
}

Example 18 with Register

use of org.jikesrvm.compilers.opt.ir.Register in project JikesRVM by JikesRVM.

the class BURS_Helpers method LONG_CONSTANT.

protected final void LONG_CONSTANT(Instruction s, RegisterOperand def, LongConstantOperand left) {
    if (VM.BuildFor32Addr) {
        long value = left.value;
        int valueHigh = (int) (value >> 32);
        int valueLow = (int) (value & 0xffffffff);
        Register register = def.getRegister();
        IntConstant(register, valueHigh);
        IntConstant(regpool.getSecondReg(register), valueLow);
    } else {
        long value = left.value;
        int bytes01 = (int) (value & 0x000000000000ffffL);
        int bytes23 = (int) ((value & 0x00000000ffff0000L) >>> 16);
        int bytes45 = (int) ((value & 0x0000ffff00000000L) >>> 32);
        int bytes67 = (int) ((value & 0xffff000000000000L) >>> 48);
        Register register = def.getRegister();
        Register temp1 = regpool.getLong();
        if (fits(value, 16)) {
            EMIT(MIR_Unary.create(PPC_LDI, L(register), IC(bytes01)));
        } else if (fits(value, 32)) {
            EMIT(MIR_Unary.create(PPC_LDIS, L(register), IC(bytes23)));
            if (bytes01 != 0)
                EMIT(MIR_Binary.create(PPC_ORI, L(register), L(register), IC(bytes01)));
        } else if (fits(value, 48)) {
            EMIT(MIR_Unary.create(PPC_LDI, L(register), IC(bytes45)));
            if (bytes45 != 0)
                EMIT(MIR_Binary.create(PPC64_SLDI, L(register), L(register), IC(32)));
            if (bytes23 != 0)
                EMIT(MIR_Binary.create(PPC_ORIS, L(register), L(register), IC(bytes23)));
            if (bytes01 != 0)
                EMIT(MIR_Binary.create(PPC_ORI, L(register), L(register), IC(bytes01)));
        } else {
            EMIT(MIR_Unary.create(PPC_LDIS, L(register), IC(bytes67)));
            if (bytes45 != 0)
                EMIT(MIR_Binary.create(PPC_ORI, L(register), L(register), IC(bytes45)));
            EMIT(MIR_Binary.create(PPC64_SLDI, L(register), L(register), IC(32)));
            if (bytes23 != 0)
                EMIT(MIR_Binary.create(PPC_ORIS, L(register), L(register), IC(bytes23)));
            if (bytes01 != 0)
                EMIT(MIR_Binary.create(PPC_ORI, L(register), L(register), IC(bytes01)));
        }
    }
}

Example 19 with Register

use of org.jikesrvm.compilers.opt.ir.Register in project JikesRVM by JikesRVM.

the class BURS_Helpers method BOOLEAN_CMP_INT_IMM.

/**
 * taken from: The PowerPC Compiler Writer's Guide, pp. 199
 */
protected final void BOOLEAN_CMP_INT_IMM(RegisterOperand def, ConditionOperand cmp, RegisterOperand one, IntConstantOperand two) {
    Register t1, t = regpool.getInteger();
    Register zero = regpool.getPhysicalRegisterSet().asPPC().getTemp();
    int value = two.value;
    switch(cmp.value) {
        case ConditionOperand.EQUAL:
            if (value == 0) {
                EMIT(MIR_Unary.create(PPC_CNTLZW, I(t), one));
            } else {
                EMIT(MIR_Binary.create(PPC_SUBFIC, I(t), one, IC(value)));
                EMIT(MIR_Unary.create(PPC_CNTLZW, I(t), I(t)));
            }
            EMIT(MIR_Binary.create(PPC_SRWI, def, I(t), IC(LOG_BITS_IN_INT)));
            break;
        case ConditionOperand.NOT_EQUAL:
            if (value == 0) {
                if (VM.BuildFor64Addr) {
                    t1 = regpool.getAddress();
                    EMIT(MIR_Unary.create(PPC64_EXTSW, A(t1), one));
                    EMIT(MIR_Binary.create(PPC_ADDIC, A(t), A(t1), IC(-1)));
                    EMIT(MIR_Binary.create(PPC_SUBFE, def, A(t), A(t1)));
                } else {
                    EMIT(MIR_Binary.create(PPC_ADDIC, A(t), one, IC(-1)));
                    EMIT(MIR_Binary.create(PPC_SUBFE, def, A(t), one.copyRO()));
                }
            } else {
                t1 = regpool.getAddress();
                if (VM.BuildFor64Addr) {
                    EMIT(MIR_Unary.create(PPC64_EXTSW, A(t1), one));
                    EMIT(MIR_Binary.create(PPC_SUBFIC, A(t1), A(t1), IC(value)));
                } else {
                    EMIT(MIR_Binary.create(PPC_SUBFIC, A(t1), one, IC(value)));
                }
                EMIT(MIR_Binary.create(PPC_ADDIC, A(t), A(t1), IC(-1)));
                EMIT(MIR_Binary.create(PPC_SUBFE, def, A(t), A(t1)));
            }
            break;
        case ConditionOperand.LESS:
            if (value == 0) {
                EMIT(MIR_Binary.create(PPC_SRWI, def, one, IC(BITS_IN_INT - 1)));
            } else if (value > 0) {
                EMIT(MIR_Binary.create(PPC_SRWI, I(t), one, IC(BITS_IN_INT - 1)));
                if (VM.BuildFor64Addr) {
                    t1 = regpool.getAddress();
                    EMIT(MIR_Unary.create(PPC64_EXTSW, A(t1), one.copyRO()));
                    EMIT(MIR_Binary.create(PPC_SUBFIC, A(zero), A(t1), IC(value - 1)));
                } else {
                    EMIT(MIR_Binary.create(PPC_SUBFIC, A(zero), one.copyRO(), IC(value - 1)));
                }
                EMIT(MIR_Unary.create(PPC_ADDZE, def, I(t)));
            } else if (value != 0xFFFF8000) {
                EMIT(MIR_Binary.create(PPC_SRWI, I(t), one, IC(BITS_IN_INT - 1)));
                if (VM.BuildFor64Addr) {
                    t1 = regpool.getAddress();
                    EMIT(MIR_Unary.create(PPC64_EXTSW, A(t1), one.copyRO()));
                    EMIT(MIR_Binary.create(PPC_SUBFIC, A(zero), A(t1), IC(value - 1)));
                } else {
                    EMIT(MIR_Binary.create(PPC_SUBFIC, A(zero), one.copyRO(), IC(value - 1)));
                }
                EMIT(MIR_Unary.create(PPC_ADDME, def, I(t)));
            } else {
                // value = 0xFFFF8000
                t1 = regpool.getAddress();
                EMIT(MIR_Binary.create(PPC_SRWI, I(t), one, IC(BITS_IN_INT - 1)));
                EMIT(MIR_Unary.create(PPC_LDI, A(t1), IC(0xFFFF8000)));
                // constructing 0xFFFF7FFF
                EMIT(MIR_Binary.create(PPC_ADDI, A(t1), A(t1), IC(-1)));
                if (VM.BuildFor64Addr) {
                    Register t2 = regpool.getAddress();
                    EMIT(MIR_Unary.create(PPC64_EXTSW, A(t2), one.copyRO()));
                    EMIT(MIR_Binary.create(PPC_SUBFC, I(zero), A(t2), I(t1)));
                } else {
                    EMIT(MIR_Binary.create(PPC_SUBFC, I(zero), one.copyRO(), I(t1)));
                }
                EMIT(MIR_Unary.create(PPC_ADDME, def, I(t)));
            }
            break;
        case ConditionOperand.GREATER:
            if (value == 0) {
                EMIT(MIR_Unary.create(PPC_NEG, I(t), one));
                EMIT(MIR_Binary.create(PPC_ANDC, I(t), I(t), one.copyRO()));
                EMIT(MIR_Binary.create(PPC_SRWI, def, I(t), IC(BITS_IN_INT - 1)));
            } else if (value >= 0) {
                EMIT(MIR_Binary.create(PPC_SRAWI, I(t), one, IC(BITS_IN_INT - 1)));
                if (VM.BuildFor64Addr) {
                    t1 = regpool.getAddress();
                    EMIT(MIR_Unary.create(PPC64_EXTSW, A(t1), one.copyRO()));
                    EMIT(MIR_Binary.create(PPC_ADDIC, A(zero), A(t1), IC(-value - 1)));
                } else {
                    EMIT(MIR_Binary.create(PPC_ADDIC, A(zero), one.copyRO(), IC(-value - 1)));
                }
                EMIT(MIR_Unary.create(PPC_ADDZE, def, I(t)));
            } else {
                t1 = regpool.getInteger();
                EMIT(MIR_Binary.create(PPC_SRAWI, I(t), one, IC(BITS_IN_INT - 1)));
                if (VM.BuildFor64Addr) {
                    EMIT(MIR_Unary.create(PPC64_EXTSW, A(t1), one.copyRO()));
                    EMIT(MIR_Binary.create(PPC_ADDIC, A(zero), A(t1), IC(-value - 1)));
                } else {
                    EMIT(MIR_Binary.create(PPC_ADDIC, A(zero), one.copyRO(), IC(-value - 1)));
                }
                EMIT(MIR_Unary.create(PPC_LDI, I(t1), IC(1)));
                EMIT(MIR_Binary.create(PPC_ADDE, def, I(t), I(t1)));
            }
            break;
        case ConditionOperand.LESS_EQUAL:
            if (value == 0) {
                EMIT(MIR_Binary.create(PPC_ADDI, I(t), one, IC(-1)));
                EMIT(MIR_Binary.create(PPC_OR, I(t), I(t), one.copyRO()));
                EMIT(MIR_Binary.create(PPC_SRWI, def, I(t), IC(BITS_IN_INT - 1)));
            } else if (value >= 0) {
                EMIT(MIR_Binary.create(PPC_SRWI, I(t), one, IC(BITS_IN_INT - 1)));
                if (VM.BuildFor64Addr) {
                    t1 = regpool.getAddress();
                    EMIT(MIR_Unary.create(PPC64_EXTSW, A(t1), one.copyRO()));
                    EMIT(MIR_Binary.create(PPC_SUBFIC, I(zero), A(t1), IC(value)));
                } else {
                    EMIT(MIR_Binary.create(PPC_SUBFIC, A(zero), one.copyRO(), IC(value)));
                }
                EMIT(MIR_Unary.create(PPC_ADDZE, def, I(t)));
            } else {
                EMIT(MIR_Binary.create(PPC_SRWI, I(t), one, IC(BITS_IN_INT - 1)));
                if (VM.BuildFor64Addr) {
                    t1 = regpool.getAddress();
                    EMIT(MIR_Unary.create(PPC64_EXTSW, A(t1), one.copyRO()));
                    EMIT(MIR_Binary.create(PPC_SUBFIC, I(zero), A(t1), IC(value)));
                } else {
                    EMIT(MIR_Binary.create(PPC_SUBFIC, A(zero), one.copyRO(), IC(value)));
                }
                EMIT(MIR_Unary.create(PPC_ADDME, def, I(t)));
            }
            break;
        case ConditionOperand.GREATER_EQUAL:
            if (value == 0) {
                EMIT(MIR_Binary.create(PPC_SRWI, I(t), one, IC(BITS_IN_INT - 1)));
                EMIT(MIR_Binary.create(PPC_XORI, def, I(t), IC(1)));
            } else if (value >= 0) {
                EMIT(MIR_Binary.create(PPC_SRAWI, I(t), one, IC(BITS_IN_INT - 1)));
                if (VM.BuildFor64Addr) {
                    t1 = regpool.getAddress();
                    EMIT(MIR_Unary.create(PPC64_EXTSW, A(t1), one.copyRO()));
                    EMIT(MIR_Binary.create(PPC_ADDIC, A(zero), A(t1), IC(-value)));
                } else {
                    EMIT(MIR_Binary.create(PPC_ADDIC, A(zero), one.copyRO(), IC(-value)));
                }
                EMIT(MIR_Unary.create(PPC_ADDZE, def, I(t)));
            } else if (value != 0xFFFF8000) {
                t1 = regpool.getInteger();
                EMIT(MIR_Unary.create(PPC_LDI, I(t1), IC(1)));
                EMIT(MIR_Binary.create(PPC_SRAWI, I(t), one, IC(BITS_IN_INT - 1)));
                if (VM.BuildFor64Addr) {
                    t1 = regpool.getAddress();
                    EMIT(MIR_Unary.create(PPC64_EXTSW, A(t1), one.copyRO()));
                    EMIT(MIR_Binary.create(PPC_ADDIC, A(zero), A(t1), IC(-value)));
                } else {
                    EMIT(MIR_Binary.create(PPC_ADDIC, A(zero), one.copyRO(), IC(-value)));
                }
                EMIT(MIR_Binary.create(PPC_ADDE, def, I(t), I(t1)));
            } else {
                // value 0xFFFF8000
                t1 = regpool.getInteger();
                EMIT(MIR_Unary.create(PPC_LDI, I(t1), IC(1)));
                EMIT(MIR_Binary.create(PPC_SRAWI, I(t), one, IC(BITS_IN_INT - 1)));
                // constructing 0x00008000
                EMIT(MIR_Binary.create(PPC_SLWI, I(zero), I(t1), IC(15)));
                if (VM.BuildFor64Addr) {
                    Register t2 = regpool.getAddress();
                    EMIT(MIR_Unary.create(PPC64_EXTSW, A(t2), one.copyRO()));
                    EMIT(MIR_Binary.create(PPC_ADDC, I(zero), A(t2), I(zero)));
                } else {
                    EMIT(MIR_Binary.create(PPC_ADDC, I(zero), one.copyRO(), I(zero)));
                }
                EMIT(MIR_Binary.create(PPC_ADDE, def, I(t), I(t1)));
            }
            break;
        case ConditionOperand.HIGHER:
            // todo
            EMIT(BooleanCmp.create(BOOLEAN_CMP_INT, def, one, two, cmp, null));
            break;
        case ConditionOperand.LOWER:
            // todo
            EMIT(BooleanCmp.create(BOOLEAN_CMP_INT, def, one, two, cmp, null));
            break;
        case ConditionOperand.HIGHER_EQUAL:
            // todo
            EMIT(BooleanCmp.create(BOOLEAN_CMP_INT, def, one, two, cmp, null));
            break;
        case ConditionOperand.LOWER_EQUAL:
            // todo
            EMIT(BooleanCmp.create(BOOLEAN_CMP_INT, def, one, two, cmp, null));
            // EMIT(MIR_Unary.create(PPC_SUBFZE, def, I(t)));
            break;
        default:
            // todo
            EMIT(BooleanCmp.create(BOOLEAN_CMP_INT, def, one, two, cmp, null));
    }
}

Example 20 with Register

use of org.jikesrvm.compilers.opt.ir.Register in project JikesRVM by JikesRVM.

the class BURS_Helpers method LONG_LOAD_addx.

protected final void LONG_LOAD_addx(Instruction s, RegisterOperand def, RegisterOperand left, RegisterOperand right, LocationOperand loc, Operand guard) {
    if (VM.VerifyAssertions)
        VM._assert(VM.BuildFor32Addr);
    Register defHigh = def.getRegister();
    Register defLow = regpool.getSecondReg(defHigh);
    Instruction inst = MIR_Load.create(PPC_LWZX, I(defHigh), left, right, loc, guard);
    inst.copyPosition(s);
    EMIT(inst);
    RegisterOperand kk = regpool.makeTempInt();
    EMIT(MIR_Binary.create(PPC_ADDI, kk, right.copyU2U(), IC(4)));
    if (loc != null) {
        loc = (LocationOperand) loc.copy();
    }
    if (guard != null) {
        guard = guard.copy();
    }
    inst = MIR_Load.create(PPC_LWZX, I(defLow), left.copyU2U(), kk.copyD2U(), loc, guard);
    inst.copyPosition(s);
    EMIT(inst);
}