use of com.cburch.logisim.file.LogisimFile in project logisim-evolution by reds-heig.
the class ProjectActions method doNew.
public static Project doNew(Project baseProject) {
LogisimFile file = createNewFile(baseProject);
Project newProj = new Project(file);
Frame frame = createFrame(baseProject, newProj);
frame.setVisible(true);
frame.getCanvas().requestFocus();
newProj.getLogisimFile().getLoader().setParent(frame);
updatecircs(file, newProj);
return newProj;
}
use of com.cburch.logisim.file.LogisimFile in project logisim-evolution by reds-heig.
the class ProjectActions method doOpenNoWindow.
public static Project doOpenNoWindow(SplashScreen monitor, File source) throws LoadFailedException {
Loader loader = new Loader(monitor);
LogisimFile file = loader.openLogisimFile(source);
Project ret = new Project(file);
updatecircs(file, ret);
return ret;
}
use of com.cburch.logisim.file.LogisimFile in project logisim-evolution by reds-heig.
the class FPGACommanderGui method DownLoadDesign.
private void DownLoadDesign(boolean generateOnly, boolean downloadOnly) {
if (generateOnly && downloadOnly) {
MyReporter.AddError("Can not have skip VHDL generation and generate HDL only in the same time...");
return;
}
if (!MapPannel.isDoneAssignment()) {
MyReporter.AddError("Download to board canceled");
return;
}
String CircuitName = circuitsList.getSelectedItem().toString();
String ProjectDir = AppPreferences.FPGA_Workspace.get() + File.separator + MyProject.getLogisimFile().getName();
if (!ProjectDir.endsWith(File.separator)) {
ProjectDir += File.separator;
}
LogisimFile myfile = MyProject.getLogisimFile();
Circuit RootSheet = myfile.getCircuit(CircuitName);
ProjectDir += CorrectLabel.getCorrectLabel(RootSheet.getName()) + File.separator;
String SourcePath = ProjectDir + AppPreferences.HDL_Type.get().toLowerCase() + File.separator;
ArrayList<String> Entities = new ArrayList<String>();
ArrayList<String> Behaviors = new ArrayList<String>();
GetVHDLFiles(ProjectDir, SourcePath, Entities, Behaviors, AppPreferences.HDL_Type.get());
if (MyBoardInformation.fpga.getVendor() == VendorSoftware.VendorAltera) {
if (AlteraDownload.GenerateQuartusScript(MyReporter, ProjectDir + HDLPaths[ScriptPath] + File.separator, RootSheet.getNetList(), MyMappableResources, MyBoardInformation, Entities, Behaviors, AppPreferences.HDL_Type.get())) {
AlteraDownload.Download(ProjectDir + HDLPaths[ScriptPath] + File.separator, SourcePath, ProjectDir + HDLPaths[SandboxPath] + File.separator, MyReporter);
}
} else if (MyBoardInformation.fpga.getVendor() == VendorSoftware.VendorXilinx) {
if (XilinxDownload.GenerateISEScripts(MyReporter, ProjectDir, ProjectDir + HDLPaths[ScriptPath] + File.separator, ProjectDir + HDLPaths[UCFPath] + File.separator, RootSheet.getNetList(), MyMappableResources, MyBoardInformation, Entities, Behaviors, AppPreferences.HDL_Type.get(), writeToFlash.isSelected()) && !generateOnly) {
XilinxDownload.Download(MyBoardInformation, ProjectDir + HDLPaths[ScriptPath] + File.separator, ProjectDir + HDLPaths[UCFPath] + File.separator, ProjectDir, ProjectDir + HDLPaths[SandboxPath] + File.separator, MyReporter);
}
} else if (MyBoardInformation.fpga.getVendor() == VendorSoftware.VendorVivado) {
if (VivadoDownload.GenerateScripts(MyReporter, ProjectDir, ProjectDir + HDLPaths[ScriptPath] + File.separator, ProjectDir + HDLPaths[XDCPath] + File.separator, ProjectDir + HDLPaths[SandboxPath] + File.separator, RootSheet.getNetList(), MyMappableResources, MyBoardInformation, Entities, Behaviors, AppPreferences.HDL_Type.get(), writeToFlash.isSelected()) && !generateOnly) {
VivadoDownload.Download(ProjectDir + HDLPaths[ScriptPath] + File.separator, ProjectDir + HDLPaths[SandboxPath] + File.separator, MyReporter, downloadOnly);
}
}
}
use of com.cburch.logisim.file.LogisimFile in project logisim-evolution by reds-heig.
the class TtyInterface method run.
public static void run(Startup args) {
File fileToOpen = args.getFilesToOpen().get(0);
Loader loader = new Loader(null);
LogisimFile file;
try {
file = loader.openLogisimFile(fileToOpen, args.getSubstitutions());
} catch (LoadFailedException e) {
logger.error("{}", Strings.get("ttyLoadError", fileToOpen.getName()));
System.exit(-1);
return;
}
int format = args.getTtyFormat();
if ((format & FORMAT_STATISTICS) != 0) {
format &= ~FORMAT_STATISTICS;
displayStatistics(file);
}
if (format == 0) {
// no simulation remaining to perform, so just exit
System.exit(0);
}
Project proj = new Project(file);
Circuit circuit = file.getMainCircuit();
Map<Instance, String> pinNames = Analyze.getPinLabels(circuit);
ArrayList<Instance> outputPins = new ArrayList<Instance>();
Instance haltPin = null;
for (Map.Entry<Instance, String> entry : pinNames.entrySet()) {
Instance pin = entry.getKey();
String pinName = entry.getValue();
if (!Pin.FACTORY.isInputPin(pin)) {
outputPins.add(pin);
if (pinName.equals("halt")) {
haltPin = pin;
}
}
}
CircuitState circState = new CircuitState(proj, circuit);
// we have to do our initial propagation before the simulation starts -
// it's necessary to populate the circuit with substates.
circState.getPropagator().propagate();
if (args.getLoadFile() != null) {
try {
boolean loaded = loadRam(circState, args.getLoadFile());
if (!loaded) {
logger.error("{}", Strings.get("loadNoRamError"));
System.exit(-1);
}
} catch (IOException e) {
logger.error("{}: {}", Strings.get("loadIoError"), e.toString());
System.exit(-1);
}
}
int ttyFormat = args.getTtyFormat();
int simCode = runSimulation(circState, outputPins, haltPin, ttyFormat);
System.exit(simCode);
}
use of com.cburch.logisim.file.LogisimFile in project logisim-evolution by reds-heig.
the class ToolboxManip method moveRequested.
public void moveRequested(ProjectExplorerEvent event, AddTool dragged, AddTool target) {
LogisimFile file = proj.getLogisimFile();
int draggedIndex = file.getTools().indexOf(dragged);
int targetIndex = file.getTools().indexOf(target);
if (targetIndex > draggedIndex)
targetIndex++;
proj.doAction(LogisimFileActions.moveCircuit(dragged, targetIndex));
}
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