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Example 21 with RegisterOperand

use of org.jikesrvm.compilers.opt.ir.operand.RegisterOperand in project JikesRVM by JikesRVM.

the class BURS_Helpers method LONG_LOAD_addx.

protected final void LONG_LOAD_addx(Instruction s, RegisterOperand def, RegisterOperand left, RegisterOperand right, LocationOperand loc, Operand guard) {
    if (VM.VerifyAssertions)
        VM._assert(VM.BuildFor32Addr);
    Register defHigh = def.getRegister();
    Register defLow = regpool.getSecondReg(defHigh);
    Instruction inst = MIR_Load.create(PPC_LWZX, I(defHigh), left, right, loc, guard);
    inst.copyPosition(s);
    EMIT(inst);
    RegisterOperand kk = regpool.makeTempInt();
    EMIT(MIR_Binary.create(PPC_ADDI, kk, right.copyU2U(), IC(4)));
    if (loc != null) {
        loc = (LocationOperand) loc.copy();
    }
    if (guard != null) {
        guard = guard.copy();
    }
    inst = MIR_Load.create(PPC_LWZX, I(defLow), left.copyU2U(), kk.copyD2U(), loc, guard);
    inst.copyPosition(s);
    EMIT(inst);
}
Also used : RegisterOperand(org.jikesrvm.compilers.opt.ir.operand.RegisterOperand) Register(org.jikesrvm.compilers.opt.ir.Register) Instruction(org.jikesrvm.compilers.opt.ir.Instruction)

Example 22 with RegisterOperand

use of org.jikesrvm.compilers.opt.ir.operand.RegisterOperand in project JikesRVM by JikesRVM.

the class BURS_Helpers method mutateTrapToCall.

private void mutateTrapToCall(Instruction s, RVMMethod target) {
    Offset offset = target.getOffset();
    RegisterOperand tmp = regpool.makeTemp(TypeReference.JavaLangObjectArray);
    Register JTOC = regpool.getPhysicalRegisterSet().asPPC().getJTOC();
    MethodOperand meth = MethodOperand.STATIC(target);
    meth.setIsNonReturningCall(true);
    int valueLow = PPCMaskLower16(offset);
    if (fits(offset, 16)) {
        EMIT(MIR_Load.create(PPC_LAddr, tmp, A(JTOC), IC(valueLow)));
    } else {
        int valueHigh = PPCMaskUpper16(offset);
        if (VM.VerifyAssertions)
            VM._assert(fits(offset, 32));
        Register reg = regpool.getAddress();
        EMIT(MIR_Binary.create(PPC_ADDIS, A(reg), A(JTOC), IC(valueHigh)));
        EMIT(MIR_Load.create(PPC_LAddr, tmp, A(reg), IC(valueLow)));
    }
    EMIT(MIR_Move.create(PPC_MTSPR, A(CTR), tmp.copyD2U()));
    EMIT(MIR_Call.mutate0(s, PPC_BCTRL, null, null, meth));
}
Also used : RegisterOperand(org.jikesrvm.compilers.opt.ir.operand.RegisterOperand) Register(org.jikesrvm.compilers.opt.ir.Register) OsrPoint(org.jikesrvm.compilers.opt.ir.OsrPoint) Offset(org.vmmagic.unboxed.Offset) MethodOperand(org.jikesrvm.compilers.opt.ir.operand.MethodOperand)

Example 23 with RegisterOperand

use of org.jikesrvm.compilers.opt.ir.operand.RegisterOperand in project JikesRVM by JikesRVM.

the class ComplexLIR2MIRExpansion method boolean_cmp.

private static void boolean_cmp(Instruction s, IR ir, boolean cmp32Bit) {
    // undo the optimization because it cannot efficiently be generated
    Register res = BooleanCmp.getClearResult(s).getRegister();
    RegisterOperand one = (RegisterOperand) BooleanCmp.getClearVal1(s);
    Operand two = BooleanCmp.getClearVal2(s);
    ConditionOperand cond = BooleanCmp.getClearCond(s);
    res.setSpansBasicBlock();
    BasicBlock BB1 = s.getBasicBlock();
    BasicBlock BB4 = BB1.splitNodeAt(s, ir);
    s = s.remove();
    BasicBlock BB2 = BB1.createSubBlock(0, ir);
    BasicBlock BB3 = BB1.createSubBlock(0, ir);
    RegisterOperand t = ir.regpool.makeTempInt();
    t.getRegister().setCondition();
    Operator op;
    if (VM.BuildFor64Addr && !cmp32Bit) {
        if (two instanceof IntConstantOperand) {
            op = cond.isUNSIGNED() ? PPC64_CMPLI : PPC64_CMPI;
        } else {
            op = cond.isUNSIGNED() ? PPC64_CMPL : PPC64_CMP;
        }
    } else if (two instanceof IntConstantOperand) {
        op = cond.isUNSIGNED() ? PPC_CMPLI : PPC_CMPI;
    } else {
        op = cond.isUNSIGNED() ? PPC_CMPL : PPC_CMP;
    }
    BB1.appendInstruction(MIR_Binary.create(op, t, one, two));
    BB1.appendInstruction(MIR_CondBranch.create(PPC_BCOND, t.copyD2U(), PowerPCConditionOperand.get(cond), BB3.makeJumpTarget(), new BranchProfileOperand()));
    BB2.appendInstruction(MIR_Unary.create(PPC_LDI, I(res), IC(0)));
    BB2.appendInstruction(MIR_Branch.create(PPC_B, BB4.makeJumpTarget()));
    BB3.appendInstruction(MIR_Unary.create(PPC_LDI, I(res), IC(1)));
    // fix CFG
    BB1.insertOut(BB2);
    BB1.insertOut(BB3);
    BB2.insertOut(BB4);
    BB3.insertOut(BB4);
    ir.cfg.linkInCodeOrder(BB1, BB2);
    ir.cfg.linkInCodeOrder(BB2, BB3);
    ir.cfg.linkInCodeOrder(BB3, BB4);
}
Also used : Operator(org.jikesrvm.compilers.opt.ir.Operator) RegisterOperand(org.jikesrvm.compilers.opt.ir.operand.RegisterOperand) IntConstantOperand(org.jikesrvm.compilers.opt.ir.operand.IntConstantOperand) Register(org.jikesrvm.compilers.opt.ir.Register) BranchProfileOperand(org.jikesrvm.compilers.opt.ir.operand.BranchProfileOperand) PowerPCConditionOperand(org.jikesrvm.compilers.opt.ir.operand.ppc.PowerPCConditionOperand) RegisterOperand(org.jikesrvm.compilers.opt.ir.operand.RegisterOperand) LocationOperand(org.jikesrvm.compilers.opt.ir.operand.LocationOperand) ConditionOperand(org.jikesrvm.compilers.opt.ir.operand.ConditionOperand) Operand(org.jikesrvm.compilers.opt.ir.operand.Operand) IntConstantOperand(org.jikesrvm.compilers.opt.ir.operand.IntConstantOperand) BasicBlock(org.jikesrvm.compilers.opt.ir.BasicBlock) BranchProfileOperand(org.jikesrvm.compilers.opt.ir.operand.BranchProfileOperand) PowerPCConditionOperand(org.jikesrvm.compilers.opt.ir.operand.ppc.PowerPCConditionOperand) ConditionOperand(org.jikesrvm.compilers.opt.ir.operand.ConditionOperand)

Example 24 with RegisterOperand

use of org.jikesrvm.compilers.opt.ir.operand.RegisterOperand in project JikesRVM by JikesRVM.

the class ComplexLIR2MIRExpansion method threeValueCmp.

/**
 * compare to values and set result to -1, 0, 1 for <, =, >, respectively
 * @param s the compare instruction
 * @param ir the governing IR
 */
private static void threeValueCmp(Instruction s, IR ir) {
    PowerPCConditionOperand firstCond = PowerPCConditionOperand.LESS_EQUAL();
    int firstConst = 1;
    switch(s.getOpcode()) {
        case DOUBLE_CMPG_opcode:
        case FLOAT_CMPG_opcode:
            firstCond = PowerPCConditionOperand.GREATER_EQUAL();
            firstConst = -1;
            break;
        case DOUBLE_CMPL_opcode:
        case FLOAT_CMPL_opcode:
            break;
        default:
            if (VM.VerifyAssertions)
                VM._assert(VM.NOT_REACHED);
            break;
    }
    Register res = Binary.getClearResult(s).getRegister();
    RegisterOperand one = (RegisterOperand) Binary.getClearVal1(s);
    RegisterOperand two = (RegisterOperand) Binary.getClearVal2(s);
    res.setSpansBasicBlock();
    BasicBlock BB1 = s.getBasicBlock();
    BasicBlock BB6 = BB1.splitNodeAt(s, ir);
    s = s.remove();
    BasicBlock BB2 = BB1.createSubBlock(0, ir);
    BasicBlock BB3 = BB1.createSubBlock(0, ir);
    BasicBlock BB4 = BB1.createSubBlock(0, ir);
    BasicBlock BB5 = BB1.createSubBlock(0, ir);
    RegisterOperand t = ir.regpool.makeTempInt();
    t.getRegister().setCondition();
    BB1.appendInstruction(MIR_Binary.create(PPC_FCMPU, t, one, two));
    BB1.appendInstruction(MIR_CondBranch.create(PPC_BCOND, t.copyD2U(), firstCond, BB3.makeJumpTarget(), new BranchProfileOperand(0.5f)));
    BB2.appendInstruction(MIR_Unary.create(PPC_LDI, I(res), IC(firstConst)));
    BB2.appendInstruction(MIR_Branch.create(PPC_B, BB6.makeJumpTarget()));
    BB3.appendInstruction(MIR_CondBranch.create(PPC_BCOND, t.copyD2U(), PowerPCConditionOperand.EQUAL(), BB5.makeJumpTarget(), BranchProfileOperand.unlikely()));
    BB4.appendInstruction(MIR_Unary.create(PPC_LDI, I(res), IC(-firstConst)));
    BB4.appendInstruction(MIR_Branch.create(PPC_B, BB6.makeJumpTarget()));
    BB5.appendInstruction(MIR_Unary.create(PPC_LDI, I(res), IC(0)));
    // fix CFG
    BB1.insertOut(BB2);
    BB1.insertOut(BB3);
    BB2.insertOut(BB6);
    BB3.insertOut(BB4);
    BB3.insertOut(BB5);
    BB4.insertOut(BB6);
    BB5.insertOut(BB6);
    ir.cfg.linkInCodeOrder(BB1, BB2);
    ir.cfg.linkInCodeOrder(BB2, BB3);
    ir.cfg.linkInCodeOrder(BB3, BB4);
    ir.cfg.linkInCodeOrder(BB4, BB5);
    ir.cfg.linkInCodeOrder(BB5, BB6);
}
Also used : RegisterOperand(org.jikesrvm.compilers.opt.ir.operand.RegisterOperand) Register(org.jikesrvm.compilers.opt.ir.Register) PowerPCConditionOperand(org.jikesrvm.compilers.opt.ir.operand.ppc.PowerPCConditionOperand) BasicBlock(org.jikesrvm.compilers.opt.ir.BasicBlock) BranchProfileOperand(org.jikesrvm.compilers.opt.ir.operand.BranchProfileOperand)

Example 25 with RegisterOperand

use of org.jikesrvm.compilers.opt.ir.operand.RegisterOperand in project JikesRVM by JikesRVM.

the class ComplexLIR2MIRExpansion method attempt.

private static void attempt(Instruction s, IR ir, boolean isAddress, boolean isLong) {
    BasicBlock BB1 = s.getBasicBlock();
    BasicBlock BB4 = BB1.splitNodeAt(s, ir);
    BasicBlock BB2 = BB1.createSubBlock(0, ir);
    BasicBlock BB3 = BB2.createSubBlock(0, ir);
    BB1.insertOut(BB2);
    BB1.insertOut(BB3);
    BB2.insertOut(BB4);
    BB3.insertOut(BB4);
    ir.cfg.linkInCodeOrder(BB1, BB2);
    ir.cfg.linkInCodeOrder(BB2, BB3);
    ir.cfg.linkInCodeOrder(BB3, BB4);
    // mutate ATTEMPT into a STWCX
    RegisterOperand newValue = (RegisterOperand) Attempt.getNewValue(s);
    RegisterOperand address = (RegisterOperand) Attempt.getAddress(s);
    Operand offset = Attempt.getOffset(s);
    LocationOperand location = Attempt.getLocation(s);
    Operand guard = Attempt.getGuard(s);
    RegisterOperand result = Attempt.getResult(s);
    MIR_Store.mutate(s, (isAddress || isLong ? PPC_STAddrCXr : PPC_STWCXr), newValue, address, offset, location, guard);
    // Branch to BB3 iff the STWXC succeeds (CR(0) is EQUAL)
    // Else fall through to BB2
    PhysicalRegisterSet phys = ir.regpool.getPhysicalRegisterSet().asPPC();
    BB1.appendInstruction(MIR_CondBranch.create(PPC_BCOND, I(phys.getConditionRegister(0)), PowerPCConditionOperand.EQUAL(), BB3.makeJumpTarget(), new BranchProfileOperand()));
    // BB2 sets result to FALSE and jumps to BB4
    BB2.appendInstruction(MIR_Unary.create(PPC_LDI, result.copyRO(), IC(0)));
    BB2.appendInstruction(MIR_Branch.create(PPC_B, BB4.makeJumpTarget()));
    // BB3 sets result to TRUE and falls through to BB4
    BB3.appendInstruction(MIR_Unary.create(PPC_LDI, result.copyRO(), IC(1)));
}
Also used : LocationOperand(org.jikesrvm.compilers.opt.ir.operand.LocationOperand) RegisterOperand(org.jikesrvm.compilers.opt.ir.operand.RegisterOperand) BranchProfileOperand(org.jikesrvm.compilers.opt.ir.operand.BranchProfileOperand) PowerPCConditionOperand(org.jikesrvm.compilers.opt.ir.operand.ppc.PowerPCConditionOperand) RegisterOperand(org.jikesrvm.compilers.opt.ir.operand.RegisterOperand) LocationOperand(org.jikesrvm.compilers.opt.ir.operand.LocationOperand) ConditionOperand(org.jikesrvm.compilers.opt.ir.operand.ConditionOperand) Operand(org.jikesrvm.compilers.opt.ir.operand.Operand) IntConstantOperand(org.jikesrvm.compilers.opt.ir.operand.IntConstantOperand) PhysicalRegisterSet(org.jikesrvm.compilers.opt.ir.ppc.PhysicalRegisterSet) BasicBlock(org.jikesrvm.compilers.opt.ir.BasicBlock) BranchProfileOperand(org.jikesrvm.compilers.opt.ir.operand.BranchProfileOperand)

Aggregations

RegisterOperand (org.jikesrvm.compilers.opt.ir.operand.RegisterOperand)364 Instruction (org.jikesrvm.compilers.opt.ir.Instruction)171 Operand (org.jikesrvm.compilers.opt.ir.operand.Operand)167 Register (org.jikesrvm.compilers.opt.ir.Register)132 IntConstantOperand (org.jikesrvm.compilers.opt.ir.operand.IntConstantOperand)122 BranchProfileOperand (org.jikesrvm.compilers.opt.ir.operand.BranchProfileOperand)103 ConditionOperand (org.jikesrvm.compilers.opt.ir.operand.ConditionOperand)98 MethodOperand (org.jikesrvm.compilers.opt.ir.operand.MethodOperand)94 TrueGuardOperand (org.jikesrvm.compilers.opt.ir.operand.TrueGuardOperand)86 LocationOperand (org.jikesrvm.compilers.opt.ir.operand.LocationOperand)81 LongConstantOperand (org.jikesrvm.compilers.opt.ir.operand.LongConstantOperand)80 BasicBlock (org.jikesrvm.compilers.opt.ir.BasicBlock)77 TrapCodeOperand (org.jikesrvm.compilers.opt.ir.operand.TrapCodeOperand)73 ConstantOperand (org.jikesrvm.compilers.opt.ir.operand.ConstantOperand)69 BranchOperand (org.jikesrvm.compilers.opt.ir.operand.BranchOperand)61 DoubleConstantOperand (org.jikesrvm.compilers.opt.ir.operand.DoubleConstantOperand)58 FloatConstantOperand (org.jikesrvm.compilers.opt.ir.operand.FloatConstantOperand)57 MemoryOperand (org.jikesrvm.compilers.opt.ir.operand.MemoryOperand)54 AddressConstantOperand (org.jikesrvm.compilers.opt.ir.operand.AddressConstantOperand)50 TypeReference (org.jikesrvm.classloader.TypeReference)48