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Example 16 with RegisterOperand

use of org.jikesrvm.compilers.opt.ir.operand.RegisterOperand in project JikesRVM by JikesRVM.

the class BURS_Helpers method CMP2.

/**
 * emit basic code to handle an INT_IFCMP2 when no folding
 * of the compare into some other computation is possible.
 */
protected final void CMP2(Instruction s, RegisterOperand val1, Operand val2, ConditionOperand cond1, ConditionOperand cond2, boolean immediate) {
    Operator op1;
    Operator op2;
    if (immediate) {
        op1 = cond1.isUNSIGNED() ? PPC_CMPLI : PPC_CMPI;
        op2 = cond2.isUNSIGNED() ? PPC_CMPLI : PPC_CMPI;
    } else {
        op1 = cond1.isUNSIGNED() ? PPC_CMPL : PPC_CMP;
        op2 = cond2.isUNSIGNED() ? PPC_CMPL : PPC_CMP;
    }
    if (op1 == op2) {
        RegisterOperand cr = regpool.makeTempCondition();
        EMIT(MIR_Binary.create(op1, cr, val1, val2));
        EMIT(MIR_CondBranch2.mutate(s, PPC_BCOND2, cr.copyD2U(), new PowerPCConditionOperand(cond1), IfCmp2.getTarget1(s), IfCmp2.getBranchProfile1(s), new PowerPCConditionOperand(cond2), IfCmp2.getTarget2(s), IfCmp2.getBranchProfile2(s)));
    } else {
        RegisterOperand cr1 = regpool.makeTempCondition();
        RegisterOperand cr2 = regpool.makeTempCondition();
        EMIT(MIR_Binary.create(op1, cr1, val1, val2));
        EMIT(MIR_Binary.create(op2, cr2, val1, val2));
        EMIT(MIR_CondBranch.create(PPC_BCOND, cr1.copyD2U(), new PowerPCConditionOperand(cond1), IfCmp2.getTarget1(s), IfCmp2.getBranchProfile1(s)));
        EMIT(MIR_CondBranch.mutate(s, PPC_BCOND, cr2.copyD2U(), new PowerPCConditionOperand(cond2), IfCmp2.getTarget2(s), IfCmp2.getBranchProfile2(s)));
    }
}
Also used : Operator(org.jikesrvm.compilers.opt.ir.Operator) RegisterOperand(org.jikesrvm.compilers.opt.ir.operand.RegisterOperand) PowerPCConditionOperand(org.jikesrvm.compilers.opt.ir.operand.ppc.PowerPCConditionOperand)

Example 17 with RegisterOperand

use of org.jikesrvm.compilers.opt.ir.operand.RegisterOperand in project JikesRVM by JikesRVM.

the class BURS_Helpers method GPR2FPR_32.

/**
 * Emits code to move 32 bits from GPRs to FPRs.<p>
 *
 * Note: intentionally uses {@code null} location to prevent DepGraph
 * from assuming that load/store not aliased. We're stepping outside
 * the Java type system here!
 */
protected final void GPR2FPR_32(Instruction s) {
    int offset = burs.ir.stackManager.allocateSpaceForConversion();
    Register FP = regpool.getPhysicalRegisterSet().asPPC().getFP();
    RegisterOperand val = (RegisterOperand) Unary.getClearVal(s);
    EMIT(MIR_Store.create(PPC_STW, val, A(FP), IC(offset), null, TG()));
    EMIT(MIR_Load.mutate(s, PPC_LFS, Unary.getClearResult(s), A(FP), IC(offset), null, TG()));
}
Also used : RegisterOperand(org.jikesrvm.compilers.opt.ir.operand.RegisterOperand) Register(org.jikesrvm.compilers.opt.ir.Register) OsrPoint(org.jikesrvm.compilers.opt.ir.OsrPoint)

Example 18 with RegisterOperand

use of org.jikesrvm.compilers.opt.ir.operand.RegisterOperand in project JikesRVM by JikesRVM.

the class BURS_Helpers method TRAP_IF_IMM.

/**
 * Take the generic LIR trap_if and coerce into the limited
 * vocabulary understood by the C trap handler on PPC.  See
 * TrapConstants.java.  Also see ConvertToLowLevelIR.java
 * which generates most of these TRAP_IFs.
 *
 * @param s the instruction to expand
 * @param longConstant is the argument a long constant?
 */
protected final void TRAP_IF_IMM(Instruction s, boolean longConstant) {
    RegisterOperand gRes = TrapIf.getClearGuardResult(s);
    RegisterOperand v1 = (RegisterOperand) TrapIf.getClearVal1(s);
    ConditionOperand cond = TrapIf.getClearCond(s);
    TrapCodeOperand tc = TrapIf.getClearTCode(s);
    switch(tc.getTrapCode()) {
        case RuntimeEntrypoints.TRAP_ARRAY_BOUNDS:
            {
                IntConstantOperand v2 = (IntConstantOperand) TrapIf.getClearVal2(s);
                if (cond.isLOWER_EQUAL()) {
                    EMIT(MIR_Trap.mutate(s, PPC_TWI, gRes, new PowerPCTrapOperand(cond), v1, v2, tc));
                } else if (cond.isHIGHER_EQUAL()) {
                    // have flip the operands and use non-immediate so trap handler can recognize.
                    RegisterOperand tmp = regpool.makeTempInt();
                    IntConstant(tmp.getRegister(), v2.value);
                    EMIT(MIR_Trap.mutate(s, PPC_TW, gRes, new PowerPCTrapOperand(cond.flipOperands()), tmp, v1, tc));
                } else {
                    throw new OptimizingCompilerException("Unexpected case of trap_if" + s);
                }
            }
            break;
        case RuntimeEntrypoints.TRAP_DIVIDE_BY_ZERO:
            {
                ConstantOperand v2 = (ConstantOperand) TrapIf.getClearVal2(s);
                if (VM.VerifyAssertions) {
                    if (longConstant) {
                        long val = ((LongConstantOperand) v2).value;
                        boolean caseMatchesExpected = val == 0L && cond.isEQUAL();
                        if (!caseMatchesExpected) {
                            String msg = "Unexpected case of trap_if" + s;
                            VM._assert(VM.NOT_REACHED, msg);
                        }
                    } else {
                        int val = ((IntConstantOperand) v2).value;
                        boolean caseMatchesExpected = val == 0L && cond.isEQUAL();
                        if (!caseMatchesExpected) {
                            String msg = "Unexpected case of trap_if" + s;
                            VM._assert(VM.NOT_REACHED, msg);
                        }
                    }
                }
                if (longConstant) {
                    if (VM.BuildFor32Addr) {
                        // A slightly ugly matter, but we need to deal with combining
                        // the two pieces of a long register from a LONG_ZERO_CHECK.
                        // A little awkward, but probably the easiest workaround...
                        RegisterOperand rr = regpool.makeTempInt();
                        EMIT(MIR_Binary.create(PPC_OR, rr, v1, I(regpool.getSecondReg(v1.getRegister()))));
                        v1 = rr.copyD2U();
                        v2 = IC(0);
                        EMIT(MIR_Trap.mutate(s, PPC_TWI, gRes, new PowerPCTrapOperand(cond), v1, v2, tc));
                    } else {
                        EMIT(MIR_Trap.mutate(s, PPC64_TDI, gRes, new PowerPCTrapOperand(cond), v1, v2, tc));
                    }
                } else {
                    EMIT(MIR_Trap.mutate(s, PPC_TWI, gRes, new PowerPCTrapOperand(cond), v1, v2, tc));
                }
            }
            break;
        default:
            throw new OptimizingCompilerException("Unexpected case of trap_if" + s);
    }
}
Also used : LongConstantOperand(org.jikesrvm.compilers.opt.ir.operand.LongConstantOperand) IntConstantOperand(org.jikesrvm.compilers.opt.ir.operand.IntConstantOperand) AddressConstantOperand(org.jikesrvm.compilers.opt.ir.operand.AddressConstantOperand) ConstantOperand(org.jikesrvm.compilers.opt.ir.operand.ConstantOperand) RegisterOperand(org.jikesrvm.compilers.opt.ir.operand.RegisterOperand) IntConstantOperand(org.jikesrvm.compilers.opt.ir.operand.IntConstantOperand) PowerPCTrapOperand(org.jikesrvm.compilers.opt.ir.operand.ppc.PowerPCTrapOperand) PowerPCConditionOperand(org.jikesrvm.compilers.opt.ir.operand.ppc.PowerPCConditionOperand) ConditionOperand(org.jikesrvm.compilers.opt.ir.operand.ConditionOperand) TrapCodeOperand(org.jikesrvm.compilers.opt.ir.operand.TrapCodeOperand) OptimizingCompilerException(org.jikesrvm.compilers.opt.OptimizingCompilerException)

Example 19 with RegisterOperand

use of org.jikesrvm.compilers.opt.ir.operand.RegisterOperand in project JikesRVM by JikesRVM.

the class BURS_Helpers method RETURN.

protected final void RETURN(Instruction s, Operand value) {
    if (value != null) {
        RegisterOperand rop = (RegisterOperand) value;
        if (VM.BuildFor32Addr && value.getType().isLongType()) {
            Register pair = regpool.getSecondReg(rop.getRegister());
            EMIT(MIR_Return.mutate(s, PPC_BLR, rop.copyU2U(), I(pair)));
        } else {
            EMIT(MIR_Return.mutate(s, PPC_BLR, rop.copyU2U(), null));
        }
    } else {
        EMIT(MIR_Return.mutate(s, PPC_BLR, null, null));
    }
}
Also used : RegisterOperand(org.jikesrvm.compilers.opt.ir.operand.RegisterOperand) Register(org.jikesrvm.compilers.opt.ir.Register)

Example 20 with RegisterOperand

use of org.jikesrvm.compilers.opt.ir.operand.RegisterOperand in project JikesRVM by JikesRVM.

the class BURS_Helpers method TRAP_IF.

// Take the generic LIR trap_if and coerce into the limited vocabulary
// understand by C trap handler on PPC.  See TrapConstants.java.
// Also see ConvertToLowLevelIR.java which generates most of these TRAP_IFs.
protected final void TRAP_IF(Instruction s) {
    RegisterOperand gRes = TrapIf.getClearGuardResult(s);
    RegisterOperand v1 = (RegisterOperand) TrapIf.getClearVal1(s);
    RegisterOperand v2 = (RegisterOperand) TrapIf.getClearVal2(s);
    ConditionOperand cond = TrapIf.getClearCond(s);
    TrapCodeOperand tc = TrapIf.getClearTCode(s);
    switch(tc.getTrapCode()) {
        case RuntimeEntrypoints.TRAP_ARRAY_BOUNDS:
            {
                if (cond.isLOWER_EQUAL()) {
                    EMIT(MIR_Trap.mutate(s, PPC_TW, gRes, new PowerPCTrapOperand(cond), v1, v2, tc));
                } else {
                    throw new OptimizingCompilerException("Unexpected case of trap_if" + s);
                }
            }
            break;
        default:
            throw new OptimizingCompilerException("Unexpected case of trap_if" + s);
    }
}
Also used : RegisterOperand(org.jikesrvm.compilers.opt.ir.operand.RegisterOperand) PowerPCTrapOperand(org.jikesrvm.compilers.opt.ir.operand.ppc.PowerPCTrapOperand) PowerPCConditionOperand(org.jikesrvm.compilers.opt.ir.operand.ppc.PowerPCConditionOperand) ConditionOperand(org.jikesrvm.compilers.opt.ir.operand.ConditionOperand) TrapCodeOperand(org.jikesrvm.compilers.opt.ir.operand.TrapCodeOperand) OptimizingCompilerException(org.jikesrvm.compilers.opt.OptimizingCompilerException)

Aggregations

RegisterOperand (org.jikesrvm.compilers.opt.ir.operand.RegisterOperand)364 Instruction (org.jikesrvm.compilers.opt.ir.Instruction)171 Operand (org.jikesrvm.compilers.opt.ir.operand.Operand)167 Register (org.jikesrvm.compilers.opt.ir.Register)132 IntConstantOperand (org.jikesrvm.compilers.opt.ir.operand.IntConstantOperand)122 BranchProfileOperand (org.jikesrvm.compilers.opt.ir.operand.BranchProfileOperand)103 ConditionOperand (org.jikesrvm.compilers.opt.ir.operand.ConditionOperand)98 MethodOperand (org.jikesrvm.compilers.opt.ir.operand.MethodOperand)94 TrueGuardOperand (org.jikesrvm.compilers.opt.ir.operand.TrueGuardOperand)86 LocationOperand (org.jikesrvm.compilers.opt.ir.operand.LocationOperand)81 LongConstantOperand (org.jikesrvm.compilers.opt.ir.operand.LongConstantOperand)80 BasicBlock (org.jikesrvm.compilers.opt.ir.BasicBlock)77 TrapCodeOperand (org.jikesrvm.compilers.opt.ir.operand.TrapCodeOperand)73 ConstantOperand (org.jikesrvm.compilers.opt.ir.operand.ConstantOperand)69 BranchOperand (org.jikesrvm.compilers.opt.ir.operand.BranchOperand)61 DoubleConstantOperand (org.jikesrvm.compilers.opt.ir.operand.DoubleConstantOperand)58 FloatConstantOperand (org.jikesrvm.compilers.opt.ir.operand.FloatConstantOperand)57 MemoryOperand (org.jikesrvm.compilers.opt.ir.operand.MemoryOperand)54 AddressConstantOperand (org.jikesrvm.compilers.opt.ir.operand.AddressConstantOperand)50 TypeReference (org.jikesrvm.classloader.TypeReference)48