use of com.cburch.logisim.circuit.Circuit in project logisim-evolution by reds-heig.
the class ProjectActions method createEmptyFile.
private static LogisimFile createEmptyFile(Loader loader, Project proj) {
InputStream templReader = AppPreferences.getEmptyTemplate().createStream();
LogisimFile file;
try {
file = loader.openLogisimFile(templReader);
} catch (Exception t) {
file = LogisimFile.createNew(loader, proj);
file.addCircuit(new Circuit("main", file, proj));
} finally {
try {
templReader.close();
} catch (IOException e) {
}
}
return file;
}
use of com.cburch.logisim.circuit.Circuit in project logisim-evolution by reds-heig.
the class InstanceStateImpl method isPortConnected.
public boolean isPortConnected(int index) {
Circuit circ = circuitState.getCircuit();
Location loc = component.getEnd(index).getLocation();
return circ.isConnected(loc, component);
}
use of com.cburch.logisim.circuit.Circuit in project logisim-evolution by reds-heig.
the class Netlist method DesignRuleCheckResult.
public int DesignRuleCheckResult(FPGAReport Reporter, String HDLIdentifier, boolean IsTopLevel, ArrayList<String> Sheetnames) {
ArrayList<String> CompName = new ArrayList<String>();
Map<String, Component> Labels = new HashMap<String, Component>();
ArrayList<SimpleDRCContainer> drc = new ArrayList<SimpleDRCContainer>();
int CommonDRCStatus = DRC_PASSED;
/* First we go down the tree and get the DRC status of all sub-circuits */
for (Circuit circ : MySubCircuitMap.keySet()) {
CommonDRCStatus |= circ.getNetList().DesignRuleCheckResult(Reporter, HDLIdentifier, false, Sheetnames);
}
/* Check if we are okay */
if (DRCStatus == DRC_PASSED) {
return CommonDRCStatus;
} else {
/* There are changes, so we clean up the old information */
clear();
DRCStatus = DRC_PASSED;
/*
* we mark already passed, if an error
* occurs the status is changed
*/
}
/*
* Check for duplicated sheet names, this is bad as we will have
* multiple "different" components with the same name
*/
if (MyCircuit.getName().isEmpty()) {
/*
* in the current implementation of logisim this should never
* happen, but we leave it in
*/
Reporter.AddFatalError("Found a sheet in your design with an empty name. This is not allowed, please specify a name!");
DRCStatus |= DRC_ERROR;
}
if (Sheetnames.contains(MyCircuit.getName())) {
/*
* in the current implementation of logisim this should never
* happen, but we leave it in
*/
Reporter.AddFatalError("Found more than one sheet in your design with the name :\"" + MyCircuit.getName() + "\". This is not allowed, please make sure that all sheets have a unique name!");
DRCStatus |= DRC_ERROR;
} else {
Sheetnames.add(MyCircuit.getName());
}
/* Preparing stage */
for (Component comp : MyCircuit.getNonWires()) {
String ComponentName = comp.getFactory().getHDLName(comp.getAttributeSet());
if (!CompName.contains(ComponentName)) {
CompName.add(ComponentName);
}
}
drc.clear();
drc.add(new SimpleDRCContainer(MyCircuit, Strings.get("HDL_noLabel"), SimpleDRCContainer.LEVEL_FATAL, SimpleDRCContainer.MARK_INSTANCE));
drc.add(new SimpleDRCContainer(MyCircuit, Strings.get("HDL_CompNameIsLabel"), SimpleDRCContainer.LEVEL_FATAL, SimpleDRCContainer.MARK_INSTANCE | SimpleDRCContainer.MARK_LABEL));
drc.add(new SimpleDRCContainer(MyCircuit, Strings.get("HDL_LabelInvalid"), SimpleDRCContainer.LEVEL_FATAL, SimpleDRCContainer.MARK_INSTANCE | SimpleDRCContainer.MARK_LABEL));
drc.add(new SimpleDRCContainer(MyCircuit, Strings.get("HDL_DuplicatedLabels"), SimpleDRCContainer.LEVEL_FATAL, SimpleDRCContainer.MARK_INSTANCE | SimpleDRCContainer.MARK_LABEL));
drc.add(new SimpleDRCContainer(MyCircuit, Strings.get("HDL_Tristate"), SimpleDRCContainer.LEVEL_FATAL, SimpleDRCContainer.MARK_INSTANCE));
drc.add(new SimpleDRCContainer(MyCircuit, Strings.get("HDL_unsupported"), SimpleDRCContainer.LEVEL_FATAL, SimpleDRCContainer.MARK_INSTANCE));
for (Component comp : MyCircuit.getNonWires()) {
/*
* Here we check if the components are supported for the HDL
* generation
*/
if (!comp.getFactory().HDLSupportedComponent(HDLIdentifier, comp.getAttributeSet())) {
drc.get(5).AddMarkComponent(comp);
DRCStatus |= DRC_ERROR;
}
/*
* we check that all components that require a non zero label
* (annotation) have a label set
*/
if (comp.getFactory().RequiresNonZeroLabel()) {
String Label = CorrectLabel.getCorrectLabel(comp.getAttributeSet().getValue(StdAttr.LABEL).toString()).toUpperCase();
String ComponentName = comp.getFactory().getHDLName(comp.getAttributeSet());
if (Label.isEmpty()) {
drc.get(0).AddMarkComponent(comp);
DRCStatus |= ANNOTATE_REQUIRED;
} else {
if (CompName.contains(Label)) {
drc.get(1).AddMarkComponent(comp);
DRCStatus |= DRC_ERROR;
}
if (!CorrectLabel.IsCorrectLabel(Label, HDLIdentifier)) {
/* this should not happen anymore */
drc.get(2).AddMarkComponent(comp);
DRCStatus |= DRC_ERROR;
}
if (Labels.containsKey(Label)) {
drc.get(3).AddMarkComponent(comp);
drc.get(3).AddMarkComponent(Labels.get(Label));
DRCStatus |= DRC_ERROR;
} else {
Labels.put(Label, comp);
}
}
if (comp.getFactory() instanceof SubcircuitFactory) {
/* Special care has to be taken for sub-circuits */
if (Label.equals(ComponentName.toUpperCase())) {
drc.get(1).AddMarkComponent(comp);
DRCStatus |= DRC_ERROR;
}
if (!CorrectLabel.IsCorrectLabel(comp.getFactory().getName(), HDLIdentifier, "Found that the component \"" + comp.getFactory().getName() + "\" in circuit \"" + MyCircuit.getName(), Reporter)) {
DRCStatus |= DRC_ERROR;
}
SubcircuitFactory sub = (SubcircuitFactory) comp.getFactory();
LocalNrOfInportBubles = LocalNrOfInportBubles + sub.getSubcircuit().getNetList().NumberOfInputBubbles();
LocalNrOfOutportBubles = LocalNrOfOutportBubles + sub.getSubcircuit().getNetList().NumberOfOutputBubbles();
LocalNrOfInOutBubles = LocalNrOfInOutBubles + sub.getSubcircuit().getNetList().NumberOfInOutBubbles();
}
}
/* Now we check that no tri-state are present */
if (comp.getFactory().HasThreeStateDrivers(comp.getAttributeSet())) {
drc.get(4).AddMarkComponent(comp);
DRCStatus |= DRC_ERROR;
}
}
for (int i = 0; i < drc.size(); i++) if (drc.get(i).DRCInfoPresent())
Reporter.AddError(drc.get(i));
drc.clear();
/* Here we have to quit as the netlist generation needs a clean tree */
if ((DRCStatus | CommonDRCStatus) != DRC_PASSED) {
return DRCStatus | CommonDRCStatus;
}
/*
* Okay we now know for sure that all elements are supported, lets build
* the net list
*/
Reporter.AddInfo("Building netlist for sheet \"" + MyCircuit.getName() + "\"");
if (!this.GenerateNetlist(Reporter, HDLIdentifier)) {
this.clear();
DRCStatus = DRC_ERROR;
/*
* here we have to quit, as all the following steps depend on a
* proper netlist
*/
return DRCStatus | CommonDRCStatus;
}
if (NetlistHasShortCircuits(Reporter)) {
clear();
DRCStatus = DRC_ERROR;
return DRCStatus | CommonDRCStatus;
}
/* Check for connections without a source */
NetlistHasSinksWithoutSource(Reporter);
/* Check for unconnected input pins on components and generate warnings */
for (NetlistComponent comp : MyComponents) {
boolean openInputs = false;
for (int j = 0; j < comp.NrOfEnds(); j++) {
if (comp.EndIsInput(j) && !comp.EndIsConnected(j))
openInputs = true;
}
if (openInputs) {
SimpleDRCContainer warn = new SimpleDRCContainer(MyCircuit, Strings.get("NetList_UnconnectedInputs"), SimpleDRCContainer.LEVEL_NORMAL, SimpleDRCContainer.MARK_INSTANCE);
warn.AddMarkComponent(comp.GetComponent());
Reporter.AddWarning(warn);
}
}
/* Check for unconnected input pins on subcircuits and generate warnings */
for (NetlistComponent comp : MySubCircuits) {
boolean openInputs = false;
for (int j = 0; j < comp.NrOfEnds(); j++) {
if (comp.EndIsInput(j) && !comp.EndIsConnected(j))
openInputs = true;
}
if (openInputs) {
SimpleDRCContainer warn = new SimpleDRCContainer(MyCircuit, Strings.get("NetList_UnconnectedInputs"), SimpleDRCContainer.LEVEL_SEVERE, SimpleDRCContainer.MARK_INSTANCE);
warn.AddMarkComponent(comp.GetComponent());
Reporter.AddWarning(warn);
}
}
/* Only if we are on the top-level we are going to build the clock-tree */
if (IsTopLevel) {
if (!DetectClockTree(Reporter)) {
DRCStatus = DRC_ERROR;
return DRCStatus | CommonDRCStatus;
}
ConstructHierarchyTree(null, new ArrayList<String>(), new Integer(0), new Integer(0), new Integer(0));
int ports = NumberOfInputPorts() + NumberOfOutputPorts() + LocalNrOfInportBubles + LocalNrOfOutportBubles + LocalNrOfInOutBubles;
if (ports == 0) {
Reporter.AddFatalError("Toplevel \"" + MyCircuit.getName() + "\" has no input(s) and/or no output(s)!");
DRCStatus = DRC_ERROR;
return DRCStatus | CommonDRCStatus;
}
/* Check for gated clocks */
if (!DetectGatedClocks(Reporter)) {
DRCStatus = DRC_ERROR;
return DRCStatus | CommonDRCStatus;
}
}
Reporter.AddInfo("Circuit \"" + MyCircuit.getName() + "\" has " + NumberOfNets() + " nets and " + NumberOfBusses() + " busses.");
Reporter.AddInfo("Circuit \"" + MyCircuit.getName() + "\" passed DRC check");
DRCStatus = DRC_PASSED;
return DRCStatus | CommonDRCStatus;
}
use of com.cburch.logisim.circuit.Circuit in project logisim-evolution by reds-heig.
the class CanvasPainter method drawWithUserState.
private void drawWithUserState(Graphics base, Graphics g, Project proj) {
Circuit circ = proj.getCurrentCircuit();
Selection sel = proj.getSelection();
Set<Component> hidden;
Tool dragTool = canvas.getDragTool();
if (dragTool == null) {
hidden = NO_COMPONENTS;
} else {
hidden = dragTool.getHiddenComponents(canvas);
if (hidden == null)
hidden = NO_COMPONENTS;
}
// draw halo around component whose attributes we are viewing
boolean showHalo = AppPreferences.ATTRIBUTE_HALO.getBoolean();
if (showHalo && haloedComponent != null && haloedCircuit == circ && !hidden.contains(haloedComponent)) {
GraphicsUtil.switchToWidth(g, 3);
g.setColor(Canvas.HALO_COLOR);
Bounds bds = haloedComponent.getBounds(g).expand(5);
int w = bds.getWidth();
int h = bds.getHeight();
double a = Canvas.SQRT_2 * w;
double b = Canvas.SQRT_2 * h;
g.drawOval((int) Math.round(bds.getX() + w / 2.0 - a / 2.0), (int) Math.round(bds.getY() + h / 2.0 - b / 2.0), (int) Math.round(a), (int) Math.round(b));
GraphicsUtil.switchToWidth(g, 1);
g.setColor(Color.BLACK);
}
// draw circuit and selection
CircuitState circState = proj.getCircuitState();
boolean printerView = AppPreferences.PRINTER_VIEW.getBoolean();
ComponentDrawContext context = new ComponentDrawContext(canvas, circ, circState, base, g, printerView);
context.setHighlightedWires(highlightedWires);
circ.draw(context, hidden);
sel.draw(context, hidden);
// draw tool
Tool tool = dragTool != null ? dragTool : proj.getTool();
if (tool != null && !canvas.isPopupMenuUp()) {
Graphics gCopy = g.create();
context.setGraphics(gCopy);
tool.draw(canvas, context);
gCopy.dispose();
}
}
use of com.cburch.logisim.circuit.Circuit in project logisim-evolution by reds-heig.
the class CanvasPainter method paintContents.
//
// painting methods
//
void paintContents(Graphics g, Project proj) {
Rectangle clip = g.getClipBounds();
Dimension size = canvas.getSize();
double zoomFactor = canvas.getZoomFactor();
if (canvas.ifPaintDirtyReset() || clip == null) {
clip = new Rectangle(0, 0, size.width, size.height);
}
// YSY removed to don't overwrite background image
// g.setColor(Color.magenta);
// g.fillRect(clip.x, clip.y, clip.width, clip.height);
grid.paintGrid(g);
g.setColor(Color.black);
Graphics gScaled = g.create();
if (zoomFactor != 1.0 && gScaled instanceof Graphics2D) {
((Graphics2D) gScaled).scale(zoomFactor, zoomFactor);
}
drawWithUserState(g, gScaled, proj);
drawWidthIncompatibilityData(g, gScaled, proj);
Circuit circ = proj.getCurrentCircuit();
CircuitState circState = proj.getCircuitState();
ComponentDrawContext ptContext = new ComponentDrawContext(canvas, circ, circState, g, gScaled);
ptContext.setHighlightedWires(highlightedWires);
gScaled.setColor(Color.RED);
circState.drawOscillatingPoints(ptContext);
gScaled.setColor(Color.BLUE);
proj.getSimulator().drawStepPoints(ptContext);
gScaled.dispose();
}
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