Examples with SubcircuitFactory com.cburch.logisim.circuit.SubcircuitFactory used on opensource projects

Example 1 with SubcircuitFactory

use of com.cburch.logisim.circuit.SubcircuitFactory in project logisim-evolution by reds-heig.

the class Netlist method GetGatedClockComponents.

public void GetGatedClockComponents(ArrayList<Netlist> HierarchyNetlists, NetlistComponent SubCircuit, Map<String, Map<NetlistComponent, Circuit>> NotGatedSet, Map<String, Map<NetlistComponent, Circuit>> GatedSet, Set<NetlistComponent> WarnedComponents, FPGAReport Reporter) {
    /* First pass: we go down the tree */
    for (NetlistComponent SubCirc : MySubCircuits) {
        SubcircuitFactory sub = (SubcircuitFactory) SubCirc.GetComponent().getFactory();
        ArrayList<String> NewHierarchyNames = new ArrayList<String>();
        ArrayList<Netlist> NewHierarchyNetlists = new ArrayList<Netlist>();
        NewHierarchyNames.addAll(GetCurrentHierarchyLevel());
        NewHierarchyNames.add(CorrectLabel.getCorrectLabel(SubCirc.GetComponent().getAttributeSet().getValue(StdAttr.LABEL)));
        NewHierarchyNetlists.addAll(HierarchyNetlists);
        NewHierarchyNetlists.add(sub.getSubcircuit().getNetList());
        sub.getSubcircuit().getNetList().SetCurrentHierarchyLevel(NewHierarchyNames);
        sub.getSubcircuit().getNetList().GetGatedClockComponents(NewHierarchyNetlists, SubCirc, NotGatedSet, GatedSet, WarnedComponents, Reporter);
    }
    /* Second pass: we find all components with a clock input and see if they are connected to a clock */
    boolean GatedClock = false;
    List<SourceInfo> PinSources = new ArrayList<SourceInfo>();
    List<Set<Wire>> PinWires = new ArrayList<Set<Wire>>();
    List<Set<NetlistComponent>> PinGatedComponents = new ArrayList<Set<NetlistComponent>>();
    List<SourceInfo> NonPinSources = new ArrayList<SourceInfo>();
    List<Set<Wire>> NonPinWires = new ArrayList<Set<Wire>>();
    List<Set<NetlistComponent>> NonPinGatedComponents = new ArrayList<Set<NetlistComponent>>();
    for (NetlistComponent comp : MyComponents) {
        ComponentFactory fact = comp.GetComponent().getFactory();
        if (fact instanceof DFlipFlop || fact instanceof JKFlipFlop || fact instanceof SRFlipFlop || fact instanceof TFlipFlop) {
            AttributeSet attrs = comp.GetComponent().getAttributeSet();
            if (IsFlipFlop(attrs)) {
                GatedClock |= HasGatedClock(comp, comp.NrOfEnds() - 5, PinSources, PinWires, PinGatedComponents, NonPinSources, NonPinWires, NonPinGatedComponents, WarnedComponents, Reporter);
            }
        } else if (fact instanceof Counter) {
            GatedClock |= HasGatedClock(comp, Counter.CK, PinSources, PinWires, PinGatedComponents, NonPinSources, NonPinWires, NonPinGatedComponents, WarnedComponents, Reporter);
        } else if (fact instanceof Ram) {
            if (IsFlipFlop(comp.GetComponent().getAttributeSet()))
                GatedClock |= HasGatedClock(comp, Ram.CLK, PinSources, PinWires, PinGatedComponents, NonPinSources, NonPinWires, NonPinGatedComponents, WarnedComponents, Reporter);
        } else if (fact instanceof Random) {
            GatedClock |= HasGatedClock(comp, Random.CK, PinSources, PinWires, PinGatedComponents, NonPinSources, NonPinWires, NonPinGatedComponents, WarnedComponents, Reporter);
        } else if (fact instanceof Register) {
            if (IsFlipFlop(comp.GetComponent().getAttributeSet()))
                GatedClock |= HasGatedClock(comp, Register.CK, PinSources, PinWires, PinGatedComponents, NonPinSources, NonPinWires, NonPinGatedComponents, WarnedComponents, Reporter);
        } else if (fact instanceof ShiftRegister) {
            GatedClock |= HasGatedClock(comp, ShiftRegister.CK, PinSources, PinWires, PinGatedComponents, NonPinSources, NonPinWires, NonPinGatedComponents, WarnedComponents, Reporter);
        }
    }
    /* We have two situations:
		 * 1) The gated clock net is generated locally, in this case we can mark them and add the current system to the non-gated set as
		 *    each instance will be equal at higher/lower levels.
		 * 2) The gated clock nets are connected to a pin, in this case each instance of this circuit could be either gated or non-gated,
		 *    we have to do something on the level higher and we mark this in the sets to be processed later. 
		 */
    String MyName = CorrectLabel.getCorrectLabel(CircuitName);
    if (HierarchyNetlists.size() > 1) {
        if (GatedClock && PinSources.isEmpty()) {
            GatedClock = false;
            /* we have only non-pin driven gated clocks */
            WarningForGatedClock(NonPinSources, NonPinGatedComponents, NonPinWires, WarnedComponents, HierarchyNetlists, Reporter, Strings.get("NetList_GatedClock"));
        }
        if (GatedClock && !PinSources.isEmpty()) {
            for (int i = 0; i < PinSources.size(); i++) {
                Reporter.AddSevereWarning(Strings.get("NetList_GatedClock"));
                Reporter.AddWarningIncrement(Strings.get("NetList_TraceListBegin"));
                SimpleDRCContainer warn = new SimpleDRCContainer(MyCircuit, Strings.get("NetList_GatedClockSink"), SimpleDRCContainer.LEVEL_NORMAL, SimpleDRCContainer.MARK_INSTANCE | SimpleDRCContainer.MARK_WIRE, true);
                warn.AddMarkComponents(PinWires.get(i));
                for (NetlistComponent comp : PinGatedComponents.get(i)) warn.AddMarkComponent(comp.GetComponent());
                Reporter.AddWarning(warn);
                WarningTraceForGatedClock(PinSources.get(i).getSource(), PinSources.get(i).getIndex(), HierarchyNetlists, CurrentHierarchyLevel, Reporter);
                Reporter.AddWarningIncrement(Strings.get("NetList_TraceListEnd"));
            }
        }
        /* we only mark if we are not at top-level */
        if (GatedClock) {
            if (GatedSet.containsKey(MyName))
                GatedSet.get(MyName).put(SubCircuit, HierarchyNetlists.get(HierarchyNetlists.size() - 2).getCircuit());
            else {
                Map<NetlistComponent, Circuit> newList = new HashMap<NetlistComponent, Circuit>();
                newList.put(SubCircuit, HierarchyNetlists.get(HierarchyNetlists.size() - 2).getCircuit());
                GatedSet.put(MyName, newList);
            }
        } else {
            if (NotGatedSet.containsKey(MyName))
                NotGatedSet.get(MyName).put(SubCircuit, HierarchyNetlists.get(HierarchyNetlists.size() - 2).getCircuit());
            else {
                Map<NetlistComponent, Circuit> newList = new HashMap<NetlistComponent, Circuit>();
                newList.put(SubCircuit, HierarchyNetlists.get(HierarchyNetlists.size() - 2).getCircuit());
                NotGatedSet.put(MyName, newList);
            }
        }
    } else {
        /* At toplevel we warn for all possible gated clocks */
        WarningForGatedClock(NonPinSources, NonPinGatedComponents, NonPinWires, WarnedComponents, HierarchyNetlists, Reporter, Strings.get("NetList_GatedClock"));
        WarningForGatedClock(PinSources, PinGatedComponents, PinWires, WarnedComponents, HierarchyNetlists, Reporter, Strings.get("NetList_PossibleGatedClock"));
    }
}

Example 2 with SubcircuitFactory

use of com.cburch.logisim.circuit.SubcircuitFactory in project logisim-evolution by reds-heig.

the class Netlist method ProcessSubcircuit.

private boolean ProcessSubcircuit(Component comp, FPGAReport Reporter) {
    NetlistComponent Subcircuit = new NetlistComponent(comp);
    SubcircuitFactory sub = (SubcircuitFactory) comp.getFactory();
    Instance[] subPins = ((CircuitAttributes) comp.getAttributeSet()).getPinInstances();
    Netlist subNetlist = sub.getSubcircuit().getNetList();
    for (EndData ThisPin : comp.getEnds()) {
        Net Connection = FindConnectedNet(ThisPin.getLocation());
        int PinId = comp.getEnds().indexOf(ThisPin);
        int SubPortIndex = subNetlist.GetPortInfo(subPins[PinId].getAttributeValue(StdAttr.LABEL));
        if (SubPortIndex < 0) {
            Reporter.AddFatalError("BUG:  Unable to find pin in sub-circuit\n ==> " + this.getClass().getName().replaceAll("\\.", "/") + ":" + Thread.currentThread().getStackTrace()[2].getLineNumber() + "\n");
            return false;
        }
        if (Connection != null) {
            boolean PinIsSink = ThisPin.isInput();
            Net RootNet = GetRootNet(Connection);
            if (RootNet == null) {
                Reporter.AddFatalError("BUG:  Unable to find a root net for sub-circuit\n ==> " + this.getClass().getName().replaceAll("\\.", "/") + ":" + Thread.currentThread().getStackTrace()[2].getLineNumber() + "\n");
                return false;
            }
            for (byte bitid = 0; bitid < ThisPin.getWidth().getWidth(); bitid++) {
                Byte RootNetBitIndex = GetRootNetIndex(Connection, bitid);
                if (RootNetBitIndex < 0) {
                    Reporter.AddFatalError("BUG:  Unable to find a root-net bit-index for sub-circuit\n ==> " + this.getClass().getName().replaceAll("\\.", "/") + ":" + Thread.currentThread().getStackTrace()[2].getLineNumber() + "\n");
                    return false;
                }
                Subcircuit.getEnd(PinId).GetConnection(bitid).SetParrentNet(RootNet, RootNetBitIndex);
                if (PinIsSink) {
                    RootNet.addSink(RootNetBitIndex, Subcircuit.getEnd(PinId).GetConnection(bitid));
                } else {
                    RootNet.addSource(RootNetBitIndex, Subcircuit.getEnd(PinId).GetConnection(bitid));
                }
                /*
					 * Special handling for sub-circuits; we have to find out
					 * the connection to the corresponding net in the underlying
					 * net-list; At this point the underlying net-lists have
					 * already been generated.
					 */
                Subcircuit.getEnd(PinId).GetConnection(bitid).setChildsPortIndex(SubPortIndex);
            }
        } else {
            for (byte bitid = 0; bitid < ThisPin.getWidth().getWidth(); bitid++) {
                Subcircuit.getEnd(PinId).GetConnection(bitid).setChildsPortIndex(SubPortIndex);
            }
        }
    }
    MySubCircuits.add(Subcircuit);
    return true;
}

Example 3 with SubcircuitFactory

use of com.cburch.logisim.circuit.SubcircuitFactory in project logisim-evolution by reds-heig.

the class Netlist method clear.

public void clear() {
    for (NetlistComponent subcirc : MySubCircuits) {
        SubcircuitFactory SubFact = (SubcircuitFactory) subcirc.GetComponent().getFactory();
        SubFact.getSubcircuit().getNetList().clear();
    }
    DRCStatus = DRC_REQUIRED;
    MyNets.clear();
    MySubCircuits.clear();
    MyComponents.clear();
    MyClockGenerators.clear();
    MyInputPorts.clear();
    MyInOutPorts.clear();
    MyOutputPorts.clear();
    MyComplexSplitters.clear();
    LocalNrOfInportBubles = 0;
    LocalNrOfOutportBubles = 0;
    LocalNrOfInOutBubles = 0;
    if (CurrentHierarchyLevel == null) {
        CurrentHierarchyLevel = new ArrayList<String>();
    } else {
        CurrentHierarchyLevel.clear();
    }
}

Example 4 with SubcircuitFactory

use of com.cburch.logisim.circuit.SubcircuitFactory in project logisim-evolution by reds-heig.

the class Netlist method circuitChanged.

@Override
public void circuitChanged(CircuitEvent event) {
    int ev = event.getAction();
    if (event.getData() instanceof InstanceComponent) {
        InstanceComponent inst = (InstanceComponent) event.getData();
        if (event.getCircuit().equals(MyCircuit)) {
            switch(ev) {
                case CircuitEvent.ACTION_ADD:
                    DRCStatus = DRC_REQUIRED;
                    if (inst.getFactory() instanceof SubcircuitFactory) {
                        SubcircuitFactory fac = (SubcircuitFactory) inst.getFactory();
                        Circuit sub = fac.getSubcircuit();
                        if (MySubCircuitMap.containsKey(sub)) {
                            MySubCircuitMap.put(sub, MySubCircuitMap.get(sub) + 1);
                        } else {
                            MySubCircuitMap.put(sub, 1);
                            sub.addCircuitListener(this);
                        }
                    }
                    break;
                case CircuitEvent.ACTION_REMOVE:
                    DRCStatus = DRC_REQUIRED;
                    if (inst.getFactory() instanceof SubcircuitFactory) {
                        SubcircuitFactory fac = (SubcircuitFactory) inst.getFactory();
                        Circuit sub = fac.getSubcircuit();
                        if (MySubCircuitMap.containsKey(sub)) {
                            if (MySubCircuitMap.get(sub) == 1) {
                                MySubCircuitMap.remove(sub);
                                sub.removeCircuitListener(this);
                            } else {
                                MySubCircuitMap.put(sub, MySubCircuitMap.get(sub) - 1);
                            }
                        }
                    }
                    break;
                case CircuitEvent.ACTION_CHANGE:
                case CircuitEvent.ACTION_CLEAR:
                case CircuitEvent.ACTION_INVALIDATE:
                    DRCStatus = DRC_REQUIRED;
                    break;
            }
        } else {
            if (inst.getFactory() instanceof Pin) {
                DRCStatus = DRC_REQUIRED;
            }
        }
    }
}

Example 5 with SubcircuitFactory

use of com.cburch.logisim.circuit.SubcircuitFactory in project logisim-evolution by reds-heig.

the class Netlist method cleanClockTree.

public void cleanClockTree(ClockSourceContainer ClockSources) {
    /* First pass, we cleanup all old information */
    MyClockInformation.clean();
    MyClockInformation.SetSourceContainer(ClockSources);
    /* Second pass, we go down the hierarchy */
    for (NetlistComponent sub : MySubCircuits) {
        SubcircuitFactory SubFact = (SubcircuitFactory) sub.GetComponent().getFactory();
        SubFact.getSubcircuit().getNetList().cleanClockTree(ClockSources);
    }
}