use of com.bfh.logisim.designrulecheck.NetlistComponent in project logisim-evolution by reds-heig.
the class MappableResourcesContainer method GetMap.
public BoardRectangle GetMap(String id) {
ArrayList<String> key = GetHierarchyKey(id);
NetlistComponent MapComp = myMappableResources.get(key);
if (MapComp == null) {
logger.error("Internal error!");
return null;
}
return MapComp.getMap(DisplayNametoMapName(id));
}
use of com.bfh.logisim.designrulecheck.NetlistComponent in project logisim-evolution by reds-heig.
the class MappableResourcesContainer method RequiresToplevelInversion.
public boolean RequiresToplevelInversion(ArrayList<String> ComponentIdentifier, String MapName) {
if (!mappedList.containsKey(MapName)) {
return false;
}
if (!myMappableResources.containsKey(ComponentIdentifier)) {
return false;
}
FPGAIOInformationContainer BoardComp = currentUsedBoard.GetComponent(mappedList.get(MapName));
NetlistComponent Comp = myMappableResources.get(ComponentIdentifier);
boolean BoardActiveHigh = (BoardComp.GetActivityLevel() == PinActivity.ActiveHigh);
boolean CompActiveHigh = Comp.GetComponent().getFactory().ActiveOnHigh(Comp.GetComponent().getAttributeSet());
boolean Invert = BoardActiveHigh ^ CompActiveHigh;
return Invert;
}
use of com.bfh.logisim.designrulecheck.NetlistComponent in project logisim-evolution by reds-heig.
the class MappableResourcesContainer method Map.
public void Map(String comp, BoardRectangle item, String Maptype) {
ArrayList<String> key = GetHierarchyKey(comp);
NetlistComponent MapComp = myMappableResources.get(key);
if (MapComp == null) {
logger.error("Internal error! comp: {}, key: {}", comp, key);
return;
}
MapComp.addMap(DisplayNametoMapName(comp), item, Maptype);
rebuildMappedLists();
}
use of com.bfh.logisim.designrulecheck.NetlistComponent in project logisim-evolution by reds-heig.
the class MappableResourcesContainer method IsMappable.
public boolean IsMappable(Map<String, ArrayList<Integer>> BoardComponents, FPGAReport MyReporter) {
for (ArrayList<String> key : myMappableResources.keySet()) {
NetlistComponent comp = myMappableResources.get(key);
/*
* we have a special case: a pinbus of the toplevel, this one has
* never a mainmaptype, so we should skip the test
*/
if (!((comp.GetComponent().getFactory() instanceof Pin) && (comp.GetComponent().getEnd(0).getWidth().getWidth() > 1))) {
/* for each component we first check the main map type */
String MainMapType = comp.GetIOInformationContainer().GetMainMapType().toString();
if (BoardComponents.containsKey(MainMapType)) {
/* okay it exists lets see if we have enough of those */
if (BoardComponents.get(MainMapType).size() > 0) {
if (comp.GetComponent().getFactory() instanceof PortIO || comp.GetComponent().getFactory() instanceof DipSwitch) {
/* Care of Port and Dip as their size may vary */
int NrOfBCRequired = comp.GetIOInformationContainer().GetNrOfInports() + comp.GetIOInformationContainer().GetNrOfOutports() + comp.GetIOInformationContainer().GetNrOfInOutports();
int bestComponentIdx = getBestComponent(BoardComponents.get(MainMapType), NrOfBCRequired);
if (bestComponentIdx > -1) {
BoardComponents.get(MainMapType).remove(bestComponentIdx);
continue;
}
} else {
/*
* no Problem, we have enough of those , we allocate
* and decrease
*/
BoardComponents.get(MainMapType).remove(BoardComponents.get(MainMapType).size() - 1);
continue;
}
}
} else {
/*
* The board does not have the main type, hence we have
* anyways to use alternate mapping
*/
comp.ToggleAlternateMapping(key);
comp.LockAlternateMapping(key);
}
}
/* Here we check if the component can be mapped to an alternate map */
int AltMapId = 0;
String AltMapType;
boolean found = false;
do {
AltMapType = comp.GetIOInformationContainer().GetAlternateMapType(AltMapId).toString();
if (!AltMapType.equals(IOComponentTypes.Unknown.toString())) {
if (BoardComponents.containsKey(AltMapType)) {
int NrOfBCRequired = comp.GetIOInformationContainer().GetNrOfInports() + comp.GetIOInformationContainer().GetNrOfOutports() + comp.GetIOInformationContainer().GetNrOfInOutports();
if (NrOfBCRequired <= BoardComponents.get(AltMapType).size()) {
// NrOfBCRequired);
for (int i = 0; i < NrOfBCRequired; i++) {
BoardComponents.get(AltMapType).remove(BoardComponents.get(AltMapType).size() - 1);
}
found = true;
break;
}
}
}
AltMapId++;
} while (!AltMapType.equals(IOComponentTypes.Unknown.toString()));
if (!found) {
if (comp.AlternateMappingEnabled(key)) {
comp.UnlockAlternateMapping(key);
comp.ToggleAlternateMapping(key);
}
MyReporter.AddError("The Target board " + currentBoardName + " does not have enough IO resources to map the design!");
MyReporter.AddError("The component \"" + MapNametoDisplayName(GetMapNamesList(key, comp).get(0)) + "\" cannot be placed!");
return false;
}
}
return true;
}
use of com.bfh.logisim.designrulecheck.NetlistComponent in project logisim-evolution by reds-heig.
the class CircuitHDLGeneratorFactory method GenerateAllHDLDescriptions.
@Override
public boolean GenerateAllHDLDescriptions(Set<String> HandledComponents, String WorkingDir, ArrayList<String> Hierarchy, FPGAReport Reporter, String HDLType) {
if (MyCircuit == null) {
return false;
}
if (Hierarchy == null) {
Hierarchy = new ArrayList<String>();
}
Netlist MyNetList = MyCircuit.getNetList();
if (MyNetList == null) {
return false;
}
String WorkPath = WorkingDir;
if (!WorkPath.endsWith(File.separator)) {
WorkPath += File.separator;
}
MyNetList.SetCurrentHierarchyLevel(Hierarchy);
/* First we handle the normal components */
for (NetlistComponent ThisComponent : MyNetList.GetNormalComponents()) {
String ComponentName = ThisComponent.GetComponent().getFactory().getHDLName(ThisComponent.GetComponent().getAttributeSet());
if (!HandledComponents.contains(ComponentName)) {
HDLGeneratorFactory Worker = ThisComponent.GetComponent().getFactory().getHDLGenerator(HDLType, ThisComponent.GetComponent().getAttributeSet());
if (Worker == null) {
Reporter.AddFatalError("INTERNAL ERROR: Cannot find the VHDL generator factory for component " + ComponentName);
return false;
}
if (!Worker.IsOnlyInlined(HDLType)) {
if (!WriteEntity(WorkPath + Worker.GetRelativeDirectory(HDLType), Worker.GetEntity(MyNetList, ThisComponent.GetComponent().getAttributeSet(), ComponentName, Reporter, HDLType), ComponentName, Reporter, HDLType)) {
return false;
}
if (!WriteArchitecture(WorkPath + Worker.GetRelativeDirectory(HDLType), Worker.GetArchitecture(MyNetList, ThisComponent.GetComponent().getAttributeSet(), ComponentName, Reporter, HDLType), ComponentName, Reporter, HDLType)) {
return false;
}
}
HandledComponents.add(ComponentName);
}
}
/* Now we go down the hierarchy to get all other components */
for (NetlistComponent ThisCircuit : MyNetList.GetSubCircuits()) {
HDLGeneratorFactory Worker = ThisCircuit.GetComponent().getFactory().getHDLGenerator(HDLType, ThisCircuit.GetComponent().getAttributeSet());
if (Worker == null) {
Reporter.AddFatalError("INTERNAL ERROR: Unable to get a subcircuit VHDL generator for '" + ThisCircuit.GetComponent().getFactory().getName() + "'");
return false;
}
Hierarchy.add(CorrectLabel.getCorrectLabel(ThisCircuit.GetComponent().getAttributeSet().getValue(StdAttr.LABEL)));
if (!Worker.GenerateAllHDLDescriptions(HandledComponents, WorkingDir, Hierarchy, Reporter, HDLType)) {
return false;
}
Hierarchy.remove(Hierarchy.size() - 1);
}
/* I also have to generate myself */
String ComponentName = CorrectLabel.getCorrectLabel(MyCircuit.getName());
if (!HandledComponents.contains(ComponentName)) {
if (!WriteEntity(WorkPath + GetRelativeDirectory(HDLType), GetEntity(MyNetList, null, ComponentName, Reporter, HDLType), ComponentName, Reporter, HDLType)) {
return false;
}
// is the current circuit an 'empty vhdl box' ?
String ArchName = MyCircuit.getStaticAttributes().getValue(CircuitAttributes.CIRCUIT_VHDL_PATH);
if (!ArchName.isEmpty()) {
if (!FileWriter.CopyArchitecture(ArchName, WorkPath + GetRelativeDirectory(HDLType), ComponentName, Reporter, HDLType)) {
return false;
}
} else {
if (!WriteArchitecture(WorkPath + GetRelativeDirectory(HDLType), GetArchitecture(MyNetList, null, ComponentName, Reporter, HDLType), ComponentName, Reporter, HDLType)) {
return false;
}
}
HandledComponents.add(ComponentName);
}
return true;
}
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