Examples with ReptarLocalBus com.cburch.logisim.std.io.ReptarLocalBus used on opensource projects

Example 1 with ReptarLocalBus

use of com.cburch.logisim.std.io.ReptarLocalBus in project logisim-evolution by reds-heig.

the class Netlist method ProcessNormalComponent.

private boolean ProcessNormalComponent(Component comp, FPGAReport Reporter) {
    NetlistComponent NormalComponent = new NetlistComponent(comp);
    for (EndData ThisPin : comp.getEnds()) {
        Net Connection = FindConnectedNet(ThisPin.getLocation());
        if (Connection != null) {
            int PinId = comp.getEnds().indexOf(ThisPin);
            boolean PinIsSink = ThisPin.isInput();
            ConnectionEnd ThisEnd = NormalComponent.getEnd(PinId);
            Net RootNet = GetRootNet(Connection);
            if (RootNet == null) {
                Reporter.AddFatalError("BUG: Unable to find a root net for a normal component\n ==> " + this.getClass().getName().replaceAll("\\.", "/") + ":" + Thread.currentThread().getStackTrace()[2].getLineNumber() + "\n");
                return false;
            }
            for (byte bitid = 0; bitid < ThisPin.getWidth().getWidth(); bitid++) {
                Byte RootNetBitIndex = GetRootNetIndex(Connection, bitid);
                if (RootNetBitIndex < 0) {
                    Reporter.AddFatalError("BUG:  Unable to find a root-net bit-index for a normal component\n ==> " + this.getClass().getName().replaceAll("\\.", "/") + ":" + Thread.currentThread().getStackTrace()[2].getLineNumber() + "\n");
                    return false;
                }
                ConnectionPoint ThisSolderPoint = ThisEnd.GetConnection(bitid);
                ThisSolderPoint.SetParrentNet(RootNet, RootNetBitIndex);
                if (PinIsSink) {
                    RootNet.addSink(RootNetBitIndex, ThisSolderPoint);
                } else {
                    RootNet.addSource(RootNetBitIndex, ThisSolderPoint);
                }
            }
        }
    }
    if (comp.getFactory() instanceof Clock) {
        MyClockGenerators.add(NormalComponent);
    } else if (comp.getFactory() instanceof Pin) {
        if (comp.getEnd(0).isInput()) {
            MyOutputPorts.add(NormalComponent);
        } else {
            MyInputPorts.add(NormalComponent);
        }
    } else if (comp.getFactory() instanceof ReptarLocalBus) {
        MyInOutPorts.add(NormalComponent);
        MyInputPorts.add(NormalComponent);
        MyOutputPorts.add(NormalComponent);
        MyComponents.add(NormalComponent);
    } else {
        MyComponents.add(NormalComponent);
    }
    return true;
}

Example 2 with ReptarLocalBus

use of com.cburch.logisim.std.io.ReptarLocalBus in project logisim-evolution by reds-heig.

the class CircuitHDLGeneratorFactory method GetModuleFunctionality.

@Override
public ArrayList<String> GetModuleFunctionality(Netlist TheNetlist, AttributeSet attrs, FPGAReport Reporter, String HDLType) {
    ArrayList<String> Contents = new ArrayList<String>();
    String Preamble = (HDLType.equals(VHDL)) ? "" : "assign ";
    String AssignmentOperator = (HDLType.equals(VHDL)) ? "<= " : "= ";
    String OpenBracket = (HDLType.equals(VHDL)) ? "(" : "[";
    String CloseBracket = (HDLType.equals(VHDL)) ? ")" : "]";
    boolean FirstLine = true;
    StringBuffer Temp = new StringBuffer();
    Map<String, Long> CompIds = new HashMap<String, Long>();
    /* we start with the connection of the clock sources */
    for (NetlistComponent ClockSource : TheNetlist.GetClockSources()) {
        if (FirstLine) {
            Contents.add("");
            Contents.addAll(MakeRemarkBlock("Here all clock generator connections are defined", 3, HDLType));
            FirstLine = false;
        }
        if (!ClockSource.EndIsConnected(0)) {
            if (ClockSource.GetComponent().getAttributeSet().getValue(StdAttr.LABEL).equals("sysclk")) {
                Reporter.AddInfo("Clock component found with no connection, skipping: '" + ClockSource.GetComponent().getAttributeSet().getValue(StdAttr.LABEL) + "'");
            } else {
                Reporter.AddWarning("Clock component found with no connection, skipping: '" + ClockSource.GetComponent().getAttributeSet().getValue(StdAttr.LABEL) + "'");
            }
            continue;
        }
        String ClockNet = GetClockNetName(ClockSource, 0, TheNetlist);
        if (ClockNet.isEmpty()) {
            Reporter.AddFatalError("INTERNAL ERROR: Cannot find clocknet!");
        }
        String ConnectedNet = GetNetName(ClockSource, 0, true, HDLType, TheNetlist);
        Temp.setLength(0);
        Temp.append(ConnectedNet);
        while (Temp.length() < SallignmentSize) {
            Temp.append(" ");
        }
        if (!TheNetlist.RequiresGlobalClockConnection()) {
            Contents.add("   " + Preamble + Temp.toString() + AssignmentOperator + ClockNet + OpenBracket + Integer.toString(ClockHDLGeneratorFactory.DerivedClockIndex) + CloseBracket + ";");
        } else {
            Contents.add("   " + Preamble + Temp.toString() + AssignmentOperator + TickComponentHDLGeneratorFactory.FPGAClock + ";");
        }
    }
    /* Here we define all wiring; hence all complex splitter connections */
    ArrayList<String> Wiring = GetHDLWiring(HDLType, TheNetlist);
    if (!Wiring.isEmpty()) {
        Contents.add("");
        Contents.addAll(MakeRemarkBlock("Here all wiring is defined", 3, HDLType));
        Contents.addAll(Wiring);
    }
    /* Now we define all input signals; hence Input port -> Internal Net */
    FirstLine = true;
    for (int i = 0; i < TheNetlist.NumberOfInputPorts(); i++) {
        if (FirstLine) {
            Contents.add("");
            Contents.addAll(MakeRemarkBlock("Here all input connections are defined", 3, HDLType));
            FirstLine = false;
        }
        NetlistComponent MyInput = TheNetlist.GetInputPin(i);
        if (!(MyInput.GetComponent().getFactory() instanceof ReptarLocalBus)) {
            Contents.add(GetSignalMap(CorrectLabel.getCorrectLabel(MyInput.GetComponent().getAttributeSet().getValue(StdAttr.LABEL)), MyInput, 0, 3, Reporter, HDLType, TheNetlist));
        }
    }
    // /* Now we define all inout signals; hence InOut port -> Internal Net
    // */
    // FirstLine = true;
    // for (int i = 0; i < TheNetlist.NumberOfInOutPorts(); i++) {
    // if (FirstLine) {
    // Contents.add("");
    // Contents.addAll(MakeRemarkBlock("Here all inout connections are defined",
    // 3, HDLType));
    // FirstLine = false;
    // }
    // NetlistComponent MyInOut = TheNetlist.GetInOutPin(i);
    // Contents.add(GetSignalMap(CorrectLabel.getCorrectLabel(MyInOut.GetComponent().getAttributeSet().getValue(StdAttr.LABEL)),
    // MyInOut, 0, 3, Reporter, HDLType, TheNetlist));
    // }
    /* Now we define all output signals; hence Internal Net -> Input port */
    FirstLine = true;
    for (int i = 0; i < TheNetlist.NumberOfOutputPorts(); i++) {
        if (FirstLine) {
            Contents.add("");
            Contents.addAll(MakeRemarkBlock("Here all output connections are defined", 3, HDLType));
            FirstLine = false;
        }
        NetlistComponent MyOutput = TheNetlist.GetOutputPin(i);
        if (!(MyOutput.GetComponent().getFactory() instanceof ReptarLocalBus)) {
            Contents.add(GetSignalMap(CorrectLabel.getCorrectLabel(MyOutput.GetComponent().getAttributeSet().getValue(StdAttr.LABEL)), MyOutput, 0, 3, Reporter, HDLType, TheNetlist));
        }
    }
    /* Here all in-lined components are generated */
    FirstLine = true;
    for (NetlistComponent comp : TheNetlist.GetNormalComponents()) {
        HDLGeneratorFactory Worker = comp.GetComponent().getFactory().getHDLGenerator(HDLType, comp.GetComponent().getAttributeSet());
        if (Worker != null) {
            if (Worker.IsOnlyInlined(HDLType)) {
                String InlinedName = comp.GetComponent().getFactory().getHDLName(comp.GetComponent().getAttributeSet());
                String InlinedId = Worker.getComponentStringIdentifier();
                Long id;
                if (CompIds.containsKey(InlinedId)) {
                    id = CompIds.get(InlinedId);
                } else {
                    id = (long) 1;
                }
                if (FirstLine) {
                    Contents.add("");
                    Contents.addAll(MakeRemarkBlock("Here all in-lined components are defined", 3, HDLType));
                    FirstLine = false;
                }
                Contents.addAll(Worker.GetInlinedCode(TheNetlist, id++, comp, Reporter, InlinedName, HDLType));
                if (CompIds.containsKey(InlinedId)) {
                    CompIds.remove(InlinedId);
                }
                CompIds.put(InlinedId, id);
            }
        }
    }
    /* Here all "normal" components are generated */
    FirstLine = true;
    for (NetlistComponent comp : TheNetlist.GetNormalComponents()) {
        HDLGeneratorFactory Worker = comp.GetComponent().getFactory().getHDLGenerator(HDLType, comp.GetComponent().getAttributeSet());
        if (Worker != null) {
            if (!Worker.IsOnlyInlined(HDLType)) {
                String CompName = comp.GetComponent().getFactory().getHDLName(comp.GetComponent().getAttributeSet());
                String CompId = Worker.getComponentStringIdentifier();
                Long id;
                if (CompIds.containsKey(CompId)) {
                    id = CompIds.get(CompId);
                } else {
                    id = (long) 1;
                }
                if (FirstLine) {
                    Contents.add("");
                    Contents.addAll(MakeRemarkBlock("Here all normal components are defined", 3, HDLType));
                    FirstLine = false;
                }
                Contents.addAll(Worker.GetComponentMap(TheNetlist, id++, comp, Reporter, CompName, HDLType));
                if (CompIds.containsKey(CompId)) {
                    CompIds.remove(CompId);
                }
                CompIds.put(CompId, id);
            }
        }
    }
    /* Finally we instantiate all sub-circuits */
    FirstLine = true;
    for (NetlistComponent comp : TheNetlist.GetSubCircuits()) {
        HDLGeneratorFactory Worker = comp.GetComponent().getFactory().getHDLGenerator(HDLType, comp.GetComponent().getAttributeSet());
        if (Worker != null) {
            String CompName = comp.GetComponent().getFactory().getHDLName(comp.GetComponent().getAttributeSet());
            String CompId = Worker.getComponentStringIdentifier();
            Long id;
            if (CompIds.containsKey(CompId)) {
                id = CompIds.get(CompId);
            } else {
                id = (long) 1;
            }
            ArrayList<String> CompMap = Worker.GetComponentMap(TheNetlist, id++, comp, Reporter, CompName, HDLType);
            if (!CompMap.isEmpty()) {
                if (FirstLine) {
                    Contents.add("");
                    Contents.addAll(MakeRemarkBlock("Here all sub-circuits are defined", 3, HDLType));
                    FirstLine = false;
                }
                if (CompIds.containsKey(CompId)) {
                    CompIds.remove(CompId);
                }
                CompIds.put(CompId, id);
                Contents.addAll(CompMap);
            }
        }
    }
    Contents.add("");
    return Contents;
}

Example 3 with ReptarLocalBus

use of com.cburch.logisim.std.io.ReptarLocalBus in project logisim-evolution by reds-heig.

the class CircuitHDLGeneratorFactory method GetOutputList.

@Override
public SortedMap<String, Integer> GetOutputList(Netlist MyNetList, AttributeSet attrs) {
    SortedMap<String, Integer> Outputs = new TreeMap<String, Integer>();
    int OutputBubbles = MyNetList.NumberOfOutputBubbles();
    if (OutputBubbles > 0) {
        if (OutputBubbles > 1) {
            Outputs.put(HDLGeneratorFactory.LocalOutputBubbleBusname, OutputBubbles);
        } else {
            Outputs.put(HDLGeneratorFactory.LocalOutputBubbleBusname, 0);
        }
    }
    for (int i = 0; i < MyNetList.NumberOfOutputPorts(); i++) {
        NetlistComponent selected = MyNetList.GetOutputPin(i);
        if (selected != null) {
            if (!(selected.GetComponent().getFactory() instanceof ReptarLocalBus)) {
                Outputs.put(CorrectLabel.getCorrectLabel(selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL)), selected.GetComponent().getAttributeSet().getValue(StdAttr.WIDTH).getWidth());
            } else {
                Outputs.put(CorrectLabel.getCorrectLabel(selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL) + "_o"), selected.GetIOInformationContainer().GetNrOfOutports());
            }
        }
    }
    return Outputs;
}

Example 4 with ReptarLocalBus

use of com.cburch.logisim.std.io.ReptarLocalBus in project logisim-evolution by reds-heig.

the class CircuitHDLGeneratorFactory method GetInputList.

@Override
public SortedMap<String, Integer> GetInputList(Netlist MyNetList, AttributeSet attrs) {
    SortedMap<String, Integer> Inputs = new TreeMap<String, Integer>();
    for (int i = 0; i < MyNetList.NumberOfClockTrees(); i++) {
        Inputs.put(ClockTreeName + Integer.toString(i), ClockHDLGeneratorFactory.NrOfClockBits);
    }
    if (MyNetList.RequiresGlobalClockConnection()) {
        Inputs.put(TickComponentHDLGeneratorFactory.FPGAClock, 1);
    }
    int InputBubbles = MyNetList.NumberOfInputBubbles();
    if (InputBubbles > 0) {
        if (InputBubbles > 1) {
            Inputs.put(HDLGeneratorFactory.LocalInputBubbleBusname, InputBubbles);
        } else {
            Inputs.put(HDLGeneratorFactory.LocalInputBubbleBusname, 0);
        }
    }
    for (int i = 0; i < MyNetList.NumberOfInputPorts(); i++) {
        NetlistComponent selected = MyNetList.GetInputPin(i);
        if (selected != null) {
            if (!(selected.GetComponent().getFactory() instanceof ReptarLocalBus)) {
                Inputs.put(CorrectLabel.getCorrectLabel(selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL)), selected.GetComponent().getAttributeSet().getValue(StdAttr.WIDTH).getWidth());
            } else {
                Inputs.put(CorrectLabel.getCorrectLabel(selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL) + "_i"), selected.GetIOInformationContainer().GetNrOfInports());
            }
        }
    }
    return Inputs;
}

Example 5 with ReptarLocalBus

use of com.cburch.logisim.std.io.ReptarLocalBus in project logisim-evolution by reds-heig.

the class CircuitHDLGeneratorFactory method GetPortMap.

@Override
public SortedMap<String, String> GetPortMap(Netlist Nets, NetlistComponent ComponentInfo, FPGAReport Reporter, String HDLType) {
    SortedMap<String, String> PortMap = new TreeMap<String, String>();
    if (ComponentInfo != null) {
        SubcircuitFactory sub = (SubcircuitFactory) ComponentInfo.GetComponent().getFactory();
        Netlist MyNetList = sub.getSubcircuit().getNetList();
        int NrOfClockTrees = MyNetList.NumberOfClockTrees();
        int NrOfInputBubbles = MyNetList.NumberOfInputBubbles();
        int NrOfOutputBubbles = MyNetList.NumberOfOutputBubbles();
        int NrOfInputPorts = MyNetList.NumberOfInputPorts();
        int NrOfInOutPorts = MyNetList.NumberOfInOutPorts();
        int NrOfOutputPorts = MyNetList.NumberOfOutputPorts();
        /* First we instantiate the Clock tree busses when present */
        for (int i = 0; i < NrOfClockTrees; i++) {
            PortMap.put(ClockTreeName + Integer.toString(i), ClockTreeName + Integer.toString(i));
        }
        if (MyNetList.RequiresGlobalClockConnection()) {
            PortMap.put(TickComponentHDLGeneratorFactory.FPGAClock, TickComponentHDLGeneratorFactory.FPGAClock);
        }
        if (NrOfInputBubbles > 0) {
            PortMap.put(HDLGeneratorFactory.LocalInputBubbleBusname, HDLGeneratorFactory.LocalInputBubbleBusname + GetBubbleIndex(ComponentInfo, HDLType, true));
        }
        if (NrOfOutputBubbles > 0) {
            PortMap.put(HDLGeneratorFactory.LocalOutputBubbleBusname, HDLGeneratorFactory.LocalOutputBubbleBusname + GetBubbleIndex(ComponentInfo, HDLType, false));
        }
        if (NrOfInputPorts > 0) {
            for (int i = 0; i < NrOfInputPorts; i++) {
                NetlistComponent selected = MyNetList.GetInputPin(i);
                if (selected != null) {
                    String PinLabel = CorrectLabel.getCorrectLabel(selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL));
                    int endid = Nets.GetEndIndex(ComponentInfo, PinLabel, false);
                    if (endid < 0) {
                        Reporter.AddFatalError("INTERNAL ERROR! Could not find the end-index of a sub-circuit component : '" + PinLabel + "'");
                    } else {
                        PortMap.putAll(GetNetMap(PinLabel, true, ComponentInfo, endid, Reporter, HDLType, Nets));
                    }
                }
            }
        }
        if (NrOfInOutPorts > 0) {
            for (int i = 0; i < NrOfInOutPorts; i++) {
                NetlistComponent selected = MyNetList.GetInOutPin(i);
                if (selected != null) {
                    String PinLabel = CorrectLabel.getCorrectLabel(selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL));
                    int endid = Nets.GetEndIndex(ComponentInfo, PinLabel, false);
                    if (endid < 0) {
                        Reporter.AddFatalError("INTERNAL ERROR! Could not find the end-index of a sub-circuit component : '" + PinLabel + "'");
                    } else {
                        PortMap.putAll(GetNetMap(PinLabel, true, ComponentInfo, endid, Reporter, HDLType, Nets));
                    }
                }
            }
        }
        if (NrOfOutputPorts > 0) {
            for (int i = 0; i < NrOfOutputPorts; i++) {
                NetlistComponent selected = MyNetList.GetOutputPin(i);
                if (selected != null) {
                    String PinLabel = CorrectLabel.getCorrectLabel(selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL));
                    int endid = Nets.GetEndIndex(ComponentInfo, PinLabel, true);
                    if (endid < 0) {
                        Reporter.AddFatalError("INTERNAL ERROR! Could not find the end-index of a sub-circuit component : '" + PinLabel + "'");
                    } else {
                        PortMap.putAll(GetNetMap(PinLabel, true, ComponentInfo, endid, Reporter, HDLType, Nets));
                    }
                }
            }
        }
    } else {
        int NrOfClockTrees = Nets.NumberOfClockTrees();
        int NrOfInputBubbles = Nets.NumberOfInputBubbles();
        int NrOfOutputBubbles = Nets.NumberOfOutputBubbles();
        int NrOfInputPorts = Nets.NumberOfInputPorts();
        int NrOfInOutPorts = Nets.NumberOfInOutPorts();
        int NrOfOutputPorts = Nets.NumberOfOutputPorts();
        for (int i = 0; i < NrOfClockTrees; i++) {
            PortMap.put(ClockTreeName + Integer.toString(i), "s_" + ClockTreeName + Integer.toString(i));
        }
        if (Nets.RequiresGlobalClockConnection()) {
            PortMap.put(TickComponentHDLGeneratorFactory.FPGAClock, TickComponentHDLGeneratorFactory.FPGAClock);
        }
        if (NrOfInputBubbles > 0) {
            PortMap.put(HDLGeneratorFactory.LocalInputBubbleBusname, "s_LOGISIM_INPUT_BUBBLES");
        }
        if (NrOfOutputBubbles > 0) {
            PortMap.put(HDLGeneratorFactory.LocalOutputBubbleBusname, "s_LOGISIM_OUTPUT_BUBBLES");
        }
        if (NrOfInputPorts > 0) {
            for (int i = 0; i < NrOfInputPorts; i++) {
                NetlistComponent selected = Nets.GetInputPin(i);
                if (selected != null) {
                    if (selected.GetComponent().getFactory() instanceof ReptarLocalBus) {
                        MappableResourcesContainer mapInfo = ((ReptarLocalBus) selected.GetComponent().getFactory()).getMapInfo();
                        int start = mapInfo.GetFPGAInputPinId(mapInfo.currentBoardName + ":/" + selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL));
                        for (int j = 0; j < 13; j++) {
                            PortMap.put(selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL) + "_i(" + j + ")", FPGAInputPinName + "_" + (start + j));
                        }
                    } else {
                        String PinLabel = CorrectLabel.getCorrectLabel(selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL));
                        PortMap.put(PinLabel, "s_" + PinLabel);
                    }
                }
            }
        }
        if (NrOfInOutPorts > 0) {
            for (int i = 0; i < NrOfInOutPorts; i++) {
                NetlistComponent selected = Nets.GetInOutPin(i);
                if (selected != null) {
                    if (selected.GetComponent().getFactory() instanceof PortIO) {
                        ArrayList<String> name = new ArrayList<String>();
                        MappableResourcesContainer mapInfo = ((PortIO) selected.GetComponent().getFactory()).getMapInfo();
                        int start = mapInfo.GetFPGAInOutPinId(mapInfo.currentBoardName + ":/" + selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL));
                        int k = 0;
                        name.add(selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL));
                        for (int j = selected.GetGlobalBubbleId(name).GetInOutStartIndex(); j <= selected.GetGlobalBubbleId(name).GetInOutEndIndex(); j++) {
                            PortMap.put(LocalInOutBubbleBusname + "(" + j + ")", FPGAInOutPinName + "_" + (start + k));
                            k++;
                        }
                    } else if (selected.GetComponent().getFactory() instanceof ReptarLocalBus) {
                        ArrayList<String> name = new ArrayList<String>();
                        name.add(selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL));
                        for (int j = selected.GetGlobalBubbleId(name).GetInOutStartIndex(); j <= selected.GetGlobalBubbleId(name).GetInOutEndIndex(); j++) {
                            PortMap.put(LocalInOutBubbleBusname + "(" + j + ")", FPGAInOutPinName + "_" + j);
                        }
                    } else {
                        String PinLabel = CorrectLabel.getCorrectLabel(selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL));
                        PortMap.put(PinLabel, "s_" + PinLabel);
                    }
                }
            }
        }
        if (NrOfOutputPorts > 0) {
            for (int i = 0; i < NrOfOutputPorts; i++) {
                NetlistComponent selected = Nets.GetOutputPin(i);
                if (selected != null) {
                    if (selected.GetComponent().getFactory() instanceof ReptarLocalBus) {
                        ArrayList<String> name = new ArrayList<String>();
                        name.add(selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL));
                        int k = 0;
                        for (int j = selected.GetGlobalBubbleId(name).GetOutputStartIndex(); j <= selected.GetGlobalBubbleId(name).GetOutputEndIndex(); j++) {
                            PortMap.put(selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL) + "_o(" + k + ")", "FPGA_LB_OUT_" + k);
                            k++;
                        }
                    // for (int j =
                    // selected.GetGlobalBubbleId(name).GetOutputStartIndex();
                    // j <=
                    // selected.GetGlobalBubbleId(name).GetOutputEndIndex();
                    // j++) {
                    // PortMap.put(selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL)
                    // + "_o", FPGAOutputPinName + "_" + j);
                    // }
                    } else {
                        String PinLabel = CorrectLabel.getCorrectLabel(selected.GetComponent().getAttributeSet().getValue(StdAttr.LABEL));
                        PortMap.put(PinLabel, "s_" + PinLabel);
                    }
                }
            }
        }
    }
    return PortMap;
}